mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 34

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

4.0
4.1
The MT90503 CPU module provides an interface permitting programmability from an external microprocessor. The
CPU module permits read/write access from MT90503: internal registers, internal and external memories.
The CPU interface comprises of:
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The CPU interface can be configured to operate with either Intel or Motorola CPUs. The MT90503 supports both
8-bit or 16-bit data bus and multiplexed or non-multiplexed address/data pins. If the CPU is operating in 15-bit byte
mode addressing with the LSB of its address bus as a byte field, then the inmo_a [14:0] pins of the MT90503 can
be connected to the a[15:1] pins of the CPU. If both the MT90503 and the CPU are in 15-bit word mode addressing,
then the inmo_a[14:0] pins should be connected to the a[14:0] pins of the CPU.
A reduced set of registers ‘CPU Interface Registers’ (0000h to 000Ah) are employed to optimize access time and to
permit the CPU to execute indirect read/write accesses via these registers. The CPU also engages these registers
to perform direct read/write accesses. The MT90503 and CPU timing relationship is described in section 9.1 on
page 211.
The CPU Control Register (0100h) provides a software reset capability that allows the CPU to reset the MT90503
except for the CPU interface. The CPU interface can only be reset by a hardware reset.
1. This product incorporates technology licensed from Melita International Corporation.
Direct Access Select (DAS) as the MSB bit concatenated with a 15-bit address bus
16-bit data bus
2 interrupt signals
associated control signals
little endian format, unless otherwise specified
CPU Interface
Functional Description
pllvdd_0
pllvss_0
pllvdd_1
pllvss_1
pllagn
pllp2
301 ohm (1%)
1
Figure 5 - PLL Pin Connections
Zarlink Semiconductor Inc.
100pF
100pF
MT90503
34
0.001uF
0.001uF
0.01uF (5%)
10uF
10uF
VDD
VDD
Data Sheet