am79c850 Advanced Micro Devices, am79c850 Datasheet - Page 20

• Manufacturer Part Number: am79c850
• Description: Supernet-r 3
• Manufacturer: Advanced Micro Devices

RS 5:0
Receive Status pins (outputs)
An additional receive status pin has been added to
provide more receive information. The encoding of the
status pins is fully backward compatible with the
QCTRL 2:0
Queue Control pins (outputs)
The encoding of the QCTRL pins is as follows:
Slower Buffer Memory Interface
The buffer memory interface has been modified ena-
bling slower SRAMs (35 ns) to be used as buffer
memory. This reduces the system cost. The interface is
fully backward compatible with the SUPERNET 2 buffer
memory interface.
20
QCTRL2 QCTRL1 QCTRL0 Indicated Status
RS5
0
0
0
0
1
1
1
1
AMD
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
RS4
X
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
RS3
(1) Quiescent.
(2) Space remains for more
data while loading a
transmit queue
Unloading transmit frame
from Synchronous Queue
Unloading transmit frame
from Asynchronous Queue 0
Unloading transmit frame
from Asynchronous Queue 1
Reserved
Current transmit frame
Underrun
Current transmit queue full
Current transmit queue
almost full
X
X
0
0
0
0
0
0
0
1
through
RS2
X
0
0
0
0
1
1
1
1
1
P R E L I M I N A R Y
RS1
SUPERNET 3
X
0
0
1
1
0
0
1
1
1
SUPERNET 2 chipset. The enhanced encoding is
enabled by setting the MENRS bit in the mode register 3
(MDREG3). The encoding of the RS pins is shown on
the following table.
Clocking
LSCLK
Local Symbol Clock pin (input)
The LSCLK is a 25 MHz clock. It is used by the
PLC-S and PDX cores.
BCLK
Byte Clock pin (input)
The BCLK is a 12.5 MHz clock. It is used by the PLC-S
and the MAC cores.
BMCLK
Buffer Memory Clock pin (input)
The BMCLK is the clock signal that the MAC core uses
for generating the signals to the buffer memory. BMCLK
is driven with either a 12.5 or 25 MHz clock signal. If
12.5 MHz operation is desired, then this pin must be tied
to BCLK pin. If 25 MHz operation is desired, then this pin
must be tied to LSCLK pin.
A, C Indicators
The setting of the A, C indicators has been modified to
allow the indicator setting to be selectable in any of the
modes: online, online special mode, or external loop-
back. The A, C indicators can be set as normal, MSC
method, or not modified at all. The modified setting of
the A, C indicators can be selected by setting the
RS0
X
0
1
0
1
0
1
0
1
1
Indicated Status
As in SUPERNET 2 FORMAC Plus
Reserved
Starting Delimiter and non-data
symbol received
OSM mode: Stripping frame
Reserved
Reserved
Frame Abort
Frame Flush
Reserved
Reserved