am79c850 Advanced Micro Devices, am79c850 Datasheet - Page 32
am79c850
Manufacturer Part Number
am79c850
Description
Supernet-r 3
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C850.pdf
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Symbol Control
The SUPERNET 3 no longer supports the ability to
transmit raw symbols from the Buffer Memory to the
PHY. This feature has been removed and the mode bit
SYMCTL (bit 5, MDREG2) is now reserved and read
as zero.
Dual Attachment Station (DAS) support
The SUPERNET 3 is a SAS only device which is
extensible to a DAS configuration. For a DAS implemen-
tation, the MENDAS bit of the MDREG3 must be set and
the external PHY must be present. In a SAS
configuration, the R9:0 lines are tied to ground and X9:0
lines are driven at all times. The following configurations
are supported:
32
MSB
AMD
15
14
13
12
11
Figure 4. Delay Register (UNLCKDLY)
10
P R E L I M I N A R Y
9
SUPERNET 3
8
7
Thru_A
Wrap_A
Wrap_B
Wrap_S
Isolated
Thru_B
State
CFM
6
5
Figure 5
Figure 6
Figure 7
Figure 8
Figure
4
The internal PHY is the A-port
and the external PHY is the
B-port. The MAC is placed as
shown in the figure. The MEN-
DAS bit in the MDREG3 must
be set.
The internal PHY is the A-port
and the external PHY is the
B-port which must be in BYPASS
(if PLC). The MAC is placed as
shown in the figure. The MEN-
DAS bit in the MDREG3 must
be set.
The internal PHY is the A-port
which must be in BYPASS and
the external PHY is the B-port.
The MAC is placed as shown in
the figure. The MENDAS bit in
the MDREG3 must be set.
This is the default configuration
of the SUPERNET 3. No external
PHY is required. The MENDAS
bit in the MDREG3 must be reset
(by default). This decouples the
busses from the external PHY as
shown in the figure.
The internal PHY (A-port) and
the external PHY (B-port) are
isolated. This is the default reset
state.
This configuration is not
supported.
3
2
Description
1
RECV1 UNLOCK
RECV2 UNLOCK
THRESHOLD
THRESHOLD
0
19574A-5
LSB
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