am79c850 Advanced Micro Devices, am79c850 Datasheet - Page 50

• Manufacturer Part Number: am79c850
• Description: Supernet-r 3
• Manufacturer: Advanced Micro Devices

recognizes both source and destination addresses,
extending the strip and copy functions of the core
FDDI MAC.
The AF is a content addressable memory (CAM) that
contains 32 entries. Each entry consists of a 48-bit
comparand, a 48-bit mask and a 6-bit “personality.” The
comparand holds the MAC addresses (individual and/or
group addresses) for which to look in frames received by
the MAC. The mask identifies those bits that are to
participate in the address comparison. The personality
holds information pertaining to the comparand such as
its validity, whether it is a source or destination address,
and whether a match by this comparand is to be
considered exact.
The AF provides quasi-parallel operation, allowing
simultaneous manipulation of the CAM from the node
processor interface and address matching from the
FDDI MAC receive bus interface. The AF receives a
byte-wide data stream from the FDDI MAC receive bus
as well as the necessary control information to identify
the location of the source and destination addresses in
the byte stream. It provides an indication of source and
destination match and exact match to the FDDI MAC.
The AF also has a 16-bit wide interface to the node
processor bus. This interface allows the node processor
access to the AF data registers and the command and
status registers.
Function of the Address Filter
The AF performs the function of matching source and
destination addresses presented on the receive data
bus and indicating such matches to the MAC. The MAC
uses this information in such decisions as stripping
frames, copying frames and setting frame status
indicators. The AF also matches addresses presented
through the node processor interface and indicates
these matches in the status register. This allows the
node processor to efficiently manage the contents of
the AF.
To perform the function of matching addresses from the
receive data bus, the AF loads bytes from the receive
data bus into a comparand register. The MAC indicates
the bytes to be loaded. Once the AF receives this
indication from the MAC, the AF loads six consecutive
bytes into the comparand register. Upon loading the
comparand register, the AF performs a parallel compari-
son of all the valid CAM entries in the AF with the
comparand register. The AF then indicates the result of
this comparison to the MAC. During AF address
comparision operation from the received data bus, the
node processor interface operations are ignored, and
the ERROR bit, along with the DONE bit, is set in the
status register.
To perform the function of matching addresses from the
node processor interface, the node processor loads six
bytes of information, two bytes at a time, into the node
processor comparand registers. The node processor
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SUPERNET 3
then issues a command to the AF to perform the
comparison operation. The AF ensures that the node
processor commanded comparison does not interfere
with a comparison from the MAC receive data bus. The
AF indicates the result of the comparison to the node
processor in the status register.
To perform any comparison operations, comparands
must be written into the CAM of the AF. The node
processor performs this operation. Writing a comparand
to the CAM in the AF is done by loading the new
comparand into the node processor comparand regis-
ters. The node processor then loads a 48-bit mask
associated with this comparand by loading the mask
into the node processor mask registers. Finally, the
node processor loads the personality associated with
this comparand by loading the node processor person-
ality register. The node processor now completes the
operation by issuing a command to write into the CAM
through the command register. The status register
reflects the current state of the operation, indicating
when the AF is busy or full. Once completed, the
comparand is available for comparison operations
through both the node processor and MAC receive bus
interfaces. Additional comparands may be loaded by
repeating this operation until no empty locations remain
in the CAM.
The AF also provides a mechanism to remove entries
from the CAM. This process is called invalidation. To
invalidate an entry in the AF, the node processor will
load the contents of the CAM that are to be invalidated
into the node processor comparand registers. The node
processor then issues an instruction to find the entry in
the CAM through the command register. When it is
determined that the entry that has been found is the one
to be deleted, the node processor issues a command to
invalidate the entry. Since it is possible that more than
one entry in the AF may match the comparand, the AF
indicates when a multiple match occurs. When this
occurs, the node processor may temporarily prevent an
entry in the AF from participating in find commands
issued by the node processor until the correct entry is
found. The status register indicates when the AF is not
busy, i.e., when operations are complete.
There is one more function of the AF that allows the
entire CAM to be invalidated in a single operation. The
node processor may issue an instruction to invalidate
the entire CAM through the command register.
Node Processor Registers
There are ten registers in the node processor interface
of the AF. They are the command register, the status
register, the built-in self test signature register, the
personality register, three comparand registers and
three mask registers.