tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 150

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

TFRA08C13 OCTAL T1/E1 Framer
Framer Register Architecture
Primary Loopback Mode Control and Time Slot Address (FRM_PR24)
This register contains the loopback mode control and the 5-bit address of the line or system time slot to be looped
back. The default value is 00 (hex) (no loopback).
Table 132. Primary Time-Slot Loopback Address Register (FRM_PR24) (Y78)
Table 133. Loopback Decoding of Bits LBC[2:0] in FRM_PR24, Bits 7—5
150
LBC2
0—4
5—7
Bit
0
0
0
0
1
1
1
1
LBC1
LBC0—LBC2
0
0
1
1
0
0
1
1
TSLBA0—
TSLBA4
Symbol
LBC0
0
1
0
1
0
1
0
1
No Loopback.
Line Loopback (LLB). The received line data is looped back to the transmit line data.
Board Loopback (BLB). The received system data is looped back to the transmit
system data and AIS is sent as the line transmit data.
Single Time-Slot System Loopback (STSSLB). System CHI loopback of the time
slot selected by bit 4—bit 0. Idle code selected by FRM_PR22 is inserted in the line
payload in place of the looped back time slot.
Single Time-Slot Line Loopback (STSSLB). Line loopback of time slot selected by
bit 4—bit 0. Idle code selected by FRM_PR22 is inserted in the system CHI payload in
place of the looped back time slot.
CEPT Nailed-Up Broadcast Transmission (CNUBT). Time slot selected by
bit 4—bit 0 is transmitted normally and also placed into time slot 0.
Payload Line Loopback with Regenerated Framing and CRC Bits. This mode is
selected if FRM_PR10 bit 3 = 0. The received channelized-payload data is looped
backed to the line. The framing bits are generated within the transmit framer. The
regenerated framing information includes the F-bit pattern, the CRC checksum bit,
and the system’s facility data link bit stream. This loopback mode can be used with
the CEPT framing mode. The entire time slot 0 data (FAS and NOT FAS) is regener-
ated by the transmit framer. The receive framer processes and monitors the incoming
line data normally in this loopback mode and transmits the formatted data to the sys-
tem in the normal format via the CHI.
CEPT Nailed-Up Connect Loopback (CNUCLB). The received system time slot
selected by this register bit 4—bit 0 is looped back to the system in time slot 0. This
mode is selected if FRM_PR10 bit 3 = 1.
Payload Line Loopback with Passthrough Framing and CRC Bits. The received
channelized/payload data, the CRC bits, and the frame alignment bits are looped
back to the line. The system’s facility data link bit stream is inserted into the looped
back data and transmitted to the line. In ESF, the FDL bits are ignored when calculat-
ing the CRC-6 checksum. In CEPT, the FDL bits are included when calculating the
CRC-4 checksum, and as such this loopback mode generates CRC-4 errors back at
the remote end.
Time-Slot Loopback Address.
Loopback Control Bits[2:0].
(continued)
Description
Function
Preliminary Data Sheet
Lucent Technologies Inc.
Lucent Technologies Inc.
October 2000