tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 78

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

TFRA08C13 OCTAL T1/E1 Framer
Alarms and Performance Monitoring
Line Test Patterns
Test patterns may be transmitted to the line through either register FRM_PR20 or register FRM_PR69. Only one of
these sources may be active at the same time. Signaling must be inhibited while sending these test patterns.
Transmit Line Test Patterns—Using Register FRM_PR20
The transmit framer can be programmed through register FRM_PR20 to transmit various test patterns. These test
patterns, when enabled, overwrite the received CHI data. The test patterns available using register FRM_PR20
are:
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The unframed-AIS pattern which consists of a continuous bit stream of ones (. . . 111111 . . .) enabled by setting
register FRM_PR20 bit 0 to 1.
The unframed-auxiliary pattern which consists of a continuous bit stream of alternating ones and 0s (. . .
10101010 . . .) enabled by setting register FRM_PR20 bit 1 to 1.
The quasi-random test signal, enabled by setting register FRM_PR20 bit 3 to 1, which consists of the following:
— A pattern produced by means of a 20-stage shift register with feedback taken from the seventeenth and twen-
— Valid framing bits.
— Valid transmit facility data link (TFDL) bit information.
— Valid CRC bits.
The pseudorandom test pattern, enabled by setting register FRM_PR20 bit 2 to 1, which consists of:
— A 2
— Valid framing pattern.
— Valid transmit facility data link (TFDL) bit data.
— Valid CRC bits.
tieth stages via an exclusive-OR gate to the first stage. The output is taken from the twentieth stage and is
forced to a 1 state whenever the next 14 stages (19 through 6) are all 0. The pattern length is
1,048,575 or 2
and illustrated in Figure 29.
described by ITU Rec. 0.151 and illustrated in Figure 30.
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A
B
– 1 pattern inserted in the entire payload (time slots 1—24 in DS1 and time slots 1—32 in CEPT), as
XOR
C
Figure 29. 20-Stage Shift Register Used to Generate the Quasi-Random Signal
20
– 1 bits. This pattern is described in detail in AT&T Technical Reference 62411 [5] Appendix
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D-TYPE FLIP-FLOPS
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(continued)
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NOR
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Preliminary Data Sheet
QUASI-RANDOM TEST OUTPUT
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Lucent Technologies Inc.
Lucent Technologies Inc.
OR
October 2000
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