tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 23

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

Preliminary Data Sheet
October 2000
Pin Information
Table 2. Pin Descriptions (continued)
Lucent Technologies Inc.
Lucent Technologies Inc.
† After RESET is deasserted, the channel is in the default framing mode, as a function of the DS1/CEPT pin.
‡ Asserting this pin low will initially force RDY to a low state.
* I
u
indicates an internal pull-up, I
AD17
AC25
AC24
AC17
AC26
AE18
AE17
AB24
Pins
AD2
AC2
AF2
D24
P25
A25
D12
AB3
R23
B24
B10
N25
C23
D10
T24
A11
G4
R3
E4
R2
F3
T1
F2
T2
RFRMDATA[1 ]
RFRMDATA[2 ]
RFRMDATA[3 ]
RFRMDATA[4 ]
RFRMDATA[5 ]
RFRMDATA[6 ]
RFRMDATA[7 ]
RFRMDATA[8 ]
RFRMCK[1 ]
RFRMCK[2 ]
RFRMCK[3 ]
RFRMCK[4 ]
RFRMCK[5 ]
RFRMCK[6 ]
RFRMCK[7 ]
RFRMCK[8 ]
RFDLCK[1 ]
RFDLCK[2 ]
RFDLCK[3 ]
RFDLCK[4 ]
RFDLCK[5 ]
RFDLCK[6 ]
RFDLCK[7 ]
RFDLCK[8 ]
Symbol
RFS[1 ]
RFS[2 ]
RFS[3 ]
RFS[4 ]
RFS[5 ]
RFS[6 ]
RFS[7 ]
RFS[8 ]
(continued)
d
indicates an internal pull-down.
Type*
O
O
O
O
Receive Framer Clock. Output receive framer clock signal used to
clock out the receive framer output signals. In normal operation, this is
the recovered receive line clock signal.
Receive Framer Data. This signal is the decoded data input to the
receive elastic store. During loss of frame alignment, this signal is
forced to 1.
Receive Frame Sync. This active-high signal is the 8 kHz frame syn-
chronization pulse generated by the receive framer. During loss of
frame alignment and signaling superframe or multiframe alignment, this
signal is forced to 0.
Receive Facility Data Link Clock. In DS1-DDS with data link access,
this is an 8 kHz clock signal. Otherwise, this is a 4 kHz clock signal. The
receive data link bit changes on the falling edge of RFDLCK.
TFRA08C13 OCTAL T1/E1 Framer
Description
23