th50vsf3582 TOSHIBA Semiconductor CORPORATION, th50vsf3582 Datasheet - Page 22
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th50vsf3582
Manufacturer Part Number
th50vsf3582
Description
Sram And Flash Memory Mixed Multi-chip Package
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TH50VSF3582.pdf
(50 pages)
Auto-Program Mode
set using the Program command. The program address is latched on the falling edge of the WE signal and
data is latched on the rising edge of the fourth bus cycle (with WE control). Auto programming starts on the
rising edge of the WE signal in the fourth bus cycle. The Program and Program Verify commands are
automatically executed by the chip. The device status during programming is determined from the Hardware
Sequence flag. To read the Hardware Sequence flag, specify the address to which Write is being performed
cannot be received. To terminate execution, use a hardware reset. Note that when the operation is terminated,
data cannot be correctly written.
return to Read mode. The device status can be determined from the setting of the Hardware Sequence flag.
Either a Reset command or a hardware reset is necessary to return the device to Read mode after a failure. If a
programming operation fails, please do not try to use the block which contains the address to which data could
not be programmed.
will fail. At this time, execution of Auto Program fails. This indicates that the failure is due to the usage rather
than the device. A cell must be erased to turn it from 0 to 1.
Fast Program Mode
cycles. In this mode the first two cycles of the command sequence, which normally needs four cycles, are omitted.
Write is performed in the remaining two cycles. To execute Fast Program, input the Fast Program set command.
Write in this mode uses the Fast Program command but operation is the same at that for ordinary Auto
Program. The status of the device can be checked using the hardware sequence flag and read operations can be
performed as usual. To exit this mode, the Fast Program Reset command must be input. When the command is
input, the device returns to Read mode.
Acceleration Mode
ACC automatically sets the device to Acceleration mode. In Acceleration mode, Block Protect mode changes to
Temporary Block Unprotect mode. Write mode changes to Fast Program mode. Modes are switched by the
Fast Program mode. Operation of Write is the same as that in Auto Program mode. Releasing V
WE signal in the fourth bus cycle.
WP
WP
The TH50VSF3582/3583AASB can be programmed in either byte or word units. The Auto Program mode is
During Auto Program execution, a command sequence for the bank on which execution is being performed
Programming of a protected block is ignored. The device enters Read mode 3 µs after the rising edge of the
If an Auto Program operation fails, the device remains in programming state and does not automatically
The device allows the programming of memory cells from 1 to 0. The programming of Memory cells from 0 to 1
Fast Program is a function which enables execution of the command sequence for the Auto Program in two
The TH50VSF3582/3583AASB features Acceleration mode for reducing write time. Applying V
/ACC
/ACC
signal; thus, there is no need for a Temporary Block Unprotect operation or for setting or resetting
ends Acceleration mode.
TH50VSF3582/3583AASB
2001-06-08 22/50
ACC
to WP or
ACC
.
to