th50vsf3582 TOSHIBA Semiconductor CORPORATION, th50vsf3582 Datasheet - Page 3
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th50vsf3582
Manufacturer Part Number
th50vsf3582
Description
Sram And Flash Memory Mixed Multi-chip Package
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TH50VSF3582.pdf
(50 pages)
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BLOCK DIAGRAM
MODE SELECTION
Flash Read
SRAM Read
Flash Write
SRAM Write
Flash Output Disable
SRAM Output Disable
Flash Standby
Flash Hardware
Reset / Standby
SRAM Standby
Notes: L = V
OPERATION MODE
F: Depends on flash memory operation mode. S: Depends on SRAM operation mode.
When CIOS = V
Does not apply when CEF =
IL
; H = V
WP
A0~A21
RESET
RY
IH
CE2S
CIOS
/ACC
CIOF
CE
CEF
; X = V
CC
/
WE
OE
UB
BY
SA
LB
1
S
and CIOF = V
CEF
IH
H
H
H
H
H
H
X
X
H
H
H
X
X
X
L
L
L
L
or V
CE
IL
H
H
H
H
X
L
L
L
X
L
L
L
X
X
X
X
X
X
CE
1
S
CC
1
A0~A21
S
, Word Mode is selected for both SRAM and flash memory.
CE2S
= V
H
H
H
H
H
H
X
L
X
L
X
L
X
X
X
X
X
L
A0~A18
IL
and CE2S = V
OE
H
H
H
H
H
L
L
L
L
L
X
X
X
X
X
X
X
X
WE
H
H
H
H
H
H
H
H
X
X
X
X
X
L
L
L
L
L
V
V
SRAM Memory
Flash Memory
CCs
CCf
IH
RESET
at the same time.
32-Mbit
8-Mbit
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
L
X
X
V
V
SS
SS
UB
H
H
H
X
X
L
L
X
X
L
L
X
X
X
X
X
X
X
TH50VSF3582/3583AASB
LB
X
X
H
X
X
H
X
X
X
H
X
X
X
X
L
L
L
L
(DQ0~DQ7)
(DQ0~DQ7)
DQ0~DQ15
DQ0~DQ15
WP
/ACC
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
2001-06-08 3/50
DQ0~DQ7 DQ8~DQ15
D
D
D
D
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
D
D
D
D
OUT
OUT
OUT
OUT
S
S
F
F
IN
IN
IN
IN
DQ0~DQ15
D
D
D
D
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
D
D
D
D
OUT
OUT
OUT
OUT
S
S
F
F
IN
IN
IN
IN
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