th50vsf3582 TOSHIBA Semiconductor CORPORATION, th50vsf3582 Datasheet - Page 48
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th50vsf3582
Manufacturer Part Number
th50vsf3582
Description
Sram And Flash Memory Mixed Multi-chip Package
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TH50VSF3582.pdf
(50 pages)
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DQ7 (
DQ6 (Toggle bit)
DATA
VA: Byte address for programming.
No
No
Any of the addresses within the block being erased during a Block Erase operation.
Don’t care during a Chip Erase operation.
Any address not within the current block during an Erase Suspend operation.
Polling)
Read Byte (DQ0~DQ7)
Read Byte (DQ0~DQ7)
Read Byte (DQ0~DQ7)
Read Byte (DQ0~DQ7)
DQ6 = Toggle?
DQ6 = Toggle?
DQ7 = Data?
DQ7 = Data?
Addr. = VA
Addr. = VA
Addr. = VA
Addr. = VA
DQ5 = 1?
DQ5 = 1?
Start
Start
Fail
Fail
No
Yes
No
Yes
Yes
Yes
1)
1)
Yes
Yes
No
No
Pass
Pass
1) :
DQ7 must be rechecked even if DQ5 = 1
because DQ7 may change at the same time
as DQ5.
1) :
DQ6 must be rechecked even if DQ5 = 1
because DQ6 may stop toggling at the same
time that DQ5 changes to 1.
TH50VSF3582/3583AASB
2001-06-08 48/50
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