mt18lsdf6472y-133 Micron Semiconductor Products, mt18lsdf6472y-133 Datasheet - Page 22

no-image

mt18lsdf6472y-133

Manufacturer Part Number
mt18lsdf6472y-133
Description
512mb X72, Ecc, Sr 168-pin Sdram Rdimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 18:
PDF: 09005aef80a2e32f/Source: 09005aef80d04a5a
SDF18C64x72G.fm - Rev. E 9/05 EN
Parameter/Condition
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
Notes: 1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
and the falling or rising edge of SDA.
write sequence to the end of the EEPROM internal erase/program cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resis-
tor, and the EEPROM does not respond to its slave address.
SS
; V
DDSPD
= +3.3V ±0.3V
512MB (x72, ECC, SR): 168-PIN SDRAM RDIMM
22
t
Symbol
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
t
t
t
HIGH
LOW
f
WRC
t
t
WRC) is the time from a valid stop condition of a
BUF
SCL
AA
DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
t
R
F
I
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
0
Serial Presence-Detect
Max
300
400
0.9
0.3
50
10
©2001 Micron Technology, Inc. All rights reserved.
Units
KHz
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
NOTES
1
2
2
3
4

Related parts for mt18lsdf6472y-133