hys64t128021hdl-3-b Infineon Technologies Corporation, hys64t128021hdl-3-b Datasheet - Page 19

• Manufacturer Part Number: hys64t128021hdl-3-b
• Description: 200-pin So-dimm Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

Table 11
Symbol
V
V
V
V
V
1)
2) The value of
3) Peak to peak ac noise on
4)
3.3
3.3.1
All Speed grades faster than DDR2-DDR400B comply with DDR2-DDR400B timing specifications(
t
List of Speed Grade Definition tables:
•
•
•
Table 12
Speed Grade
IFX Sort Name
CAS-RCD-RP latencies
Parameter
Clock Frequency
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS,
Data Sheet
RAS
DD
DDDL
DDQ
REF
TT
V
is expected to be about 0.5
V
to
Table 12 “Speed Grade Definition Speed Bins DDR2-800E” on Page 19
Table 13 “Speed Grade Definition Speed Bins for DDR2–667” on Page 20
Table 14 “Speed Grade Definition Speed Bins for DDR2-533 and DDR2-400” on Page 20
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are
further guaranteed for normal OCD drive strength (EMRS(1) A1 = 0) only.
RDQS / RDQS, input reference level is the crosspoint when in differential strobe mode
= 40ns).
DDQ
TT
V
is not applied directly to the device.
REF
tracks with
, and must track variations in die dc level of
Recommended DC Operating Conditions (SSTL_18)
AC Characteristics
Speed Grade Definitions
Speed Grade Definition Speed Bins DDR2-800E
Parameter
Supply Voltage
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
V
REF
V
may be selected by the user to provide optimum noise margin in the system. Typically the value of
DD
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
,
V
DDDL
V
REF
tracks with
V
DDQ
may not exceed
of the transmitting device and
Symbol
t
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
V
V
DD
TT
. AC parameters are measured with
is a system supply for signal termination resistors, is expected to be set equal
Min.
Rating
1.7
1.7
1.7
0.49
V
REF
2%
V
– 0.04
REF
DDR2–800E
–2.5
6–6–6
Min.
5
3.75
3
2.5
45
60
15
15
V
V
DDQ
REF
.
19
(dc)
Typ.
1.8
1.8
1.8
0.5
V
REF
V
HYS64T[32/64/128]xxxHDL-[2.5/…/5]-B
REF
V
is expected to track variations in
DDQ
Max.
8
8
8
8
70000
—
—
—
SO-DIMM DDR2 SDRAM Module
V
DD
1.9
1.9
1.9
0.51
V
Max.
REF
,
V
DDQ
+ 0.04
V
and
DDQ
Electrical Characteristics
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
ns
CK
V
05122005-2TKP-OM7N
DDDL
Rev 1.00, 2005-06
tied together.
Unit
V
V
V
V
V
V
DDQ
t
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
CK
.
= 5ns with
1)
1)
1)
2)3)
4)
Notes
V
REF