hys64t128021hdl-3-b Infineon Technologies Corporation, hys64t128021hdl-3-b Datasheet - Page 23

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hys64t128021hdl-3-b

Manufacturer Part Number
hys64t128021hdl-3-b
Description
200-pin So-dimm Ddr2 Sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 15
Parameter
Exit precharge power-down to any
valid command (other than NOP or
Deselect)
Exit Self-Refresh to non-Read
command
Exit Self-Refresh to Read
command
1) For details and notes see the relevant INFINEON component data sheet
2) 0
3) 85 °C
4) WR must be programmed to fulfill the minimum requirement for the
Data Sheet
WR
already an integer, round to the next highest integer.
parameter stored in the MRS.
MIN
T
CASE
[cycles] =
T
CASE
Timing Parameter by Speed Grade - DDR2-800 & DDR2–667 (cont’d)
85 °C
95 °C
t
WR
(ns)/
t
CK
(ns) rounded up to the next integer value.
Symbol
t
t
t
XP
XSNR
XSRD
Min.
DDR2–800
2
t
200
RFC
t
CK
+10
refers to the application clock period. WR refers to the WR
23
Max.
HYS64T[32/64/128]xxxHDL-[2.5/…/5]-B
t
WR
t
DAL
timing parameter, where
= WR + (
SO-DIMM DDR2 SDRAM Module
DDR2–667
Min.
2
t
200
RFC
+10
t
RP
/
t
CK
Max.
). For each of the terms, if not
Electrical Characteristics
05122005-2TKP-OM7N
Rev 1.00, 2005-06
Unit Notes
t
ns
t
CK
CK
1)

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