hys64t128021hdl-3-b Infineon Technologies Corporation, hys64t128021hdl-3-b Datasheet - Page 21

• Manufacturer Part Number: hys64t128021hdl-3-b
• Description: 200-pin So-dimm Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

3) Inputs are not recognized as valid until
4) The output timing reference voltage level is
5)
3.3.2
List of Timing Parameters for DDR2-800,
Table 15
Parameter
DQ output access time from CK /
CK
CAS A to CAS B command period
CK, CK high-level width
CKE minimum high and low pulse
width
CK, CK low-level width
Auto-Precharge write recovery +
precharge time
Minimum time clocks remain ON
after CKE asynchronously drops
LOW
DQ and DM input hold time
(differential data strobe)
DQ and DM input hold time (single
ended data strobe)
DQ and DM input pulse width (each
input)
DQS output access time from CK /
CK
DQS input low (high) pulse width
(write cycle)
DQS-DQ skew (for DQS &
associated DQ signals)
Write command to 1st DQS latching
transition
DQ and DM input setup time
(differential data strobe)
DQ and DM input setup time (single
ended data strobe)
DQS falling edge hold time from CK
(write cycle)
DQS falling edge to CK setup time
(write cycle)
Clock half period
Data Sheet
recognized as low.
t
equal to 9 x
RAS.MAX
is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is
AC Timing Parameters
Timing Parameter by Speed Grade - DDR2-800 & DDR2–667
t
REFI
.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AC
CCD
CH
CKE
CL
DAL
DELAY
DH
DH1
DIPW
DQSCK
DQSL,H
DQSQ
DQSS
DS
DS1
DSH
DSS
HP
V
(base) 125
(base)
REF
(base) ––
(base) ––
DDR2-667(Table
V
stabilizes. During the period before
TT
.
Min.
DDR2–800
–400
2
0.45
3
0.45
WR +
t
t
0.35
–350
0.35
—
WL –
0.25
50
0.2
0.2
MIN. (
IS
IH
+
t
CK
t
t
21
CL,
RP
+
t
CH
15), and DDR2-533,
Max.
+400
—
0.55
—
0.55
—
––
––
—
—
—
200
WL + 0.25 WL – 0.25 WL + 0.25
—
—
—
—
)
350
HYS64T[32/64/128]xxxHDL-[2.5/…/5]-B
SO-DIMM DDR2 SDRAM Module
DDR2–667
Min.
–450
2
0.45
3
0.45
WR +
t
t
175
––
0.35
–400
0.35
—
100
––
0.2
0.2
MIN. (
IS
IH
+
V
t
CK
REF
t
t
CL,
RP
+
stabilizes, CKE = 0.2 x
DDR2-400(Table
t
CH
Max.
—
0.55
—
0.55
—
—
––
—
—
—
240
—
—
—
—
)
450
400
Electrical Characteristics
05122005-2TKP-OM7N
Rev 1.00, 2005-06
Unit Notes
ps
t
t
t
t
t
ns
ps
ps
t
ps
t
ps
t
ps
ps
t
t
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
16)
V
DDQ
is
1)