m471b5273bh1 Samsung Semiconductor, Inc., m471b5273bh1 Datasheet - Page 11

• Manufacturer Part Number: m471b5273bh1
• Description: Ddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

10.2 V
V
thermore V
which setup and hold is measured. System timing and voltage budgets need to account for V
data-eye of the input signals.
and voltage effects due to ac-noise on V
Unbuffered SoDIMM
The dc-tolerance limits and ac-noise limits for the reference voltages V
The voltage levels for setup and hold time measurements V
"V
This clarifies, that dc-variations of V
This also clarifies that the DRAM setup/hold specification and derating values need to include time and voltage associated with V
V
REF
REF
REF
(t) as a function of time. (V
(DC) is the linear average of V
" shall be understood as V
REF
REF
Tolerances.
(t) may temporarily deviate from V
voltage
REF
REF
stands for V
Figure 2. Illustration of V
(DC), as defined in Figure 2.
REF
REF
REF
(t) over a very long period of time (e.g. 1 sec). This average has to meet the min/max requiremts of V
affect the absolute voltage a signal has to reach to achieve a valid high or low level and therefore the time to
up to the specified limit (+/-1% of V
REFCA
REF
(DC) by no more than ± 1% V
and V
IH
REFDQ
(AC), V
11 of 28
REF
likewise).
IH
(DC) tolerance and V
(DC), V
REFCA
IL
and V
DD
(AC) and V
DD
) are included in DRAM timings and their associated deratings.
.
REFDQ
IL
are illustrate in Figure 2. It shows a valid reference voltage
(DC) are dependent on V
REF
REF
(DC) deviations from the optimum position within the
ac-noise limits
Rev. 1.0 December 2008
V
V
SS
DD
time
REF
DDR3 SDRAM
.
REF
ac-noise. Timing
REF
. Fur-