mt9v112 Micron Semiconductor Products, mt9v112 Datasheet

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... Toys • Other battery-powered products 09005aef8154a39d/09005aef8175e6cc MT9V112_1.fm- Rev. A 1/05 EN ‡ PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONL Y AND ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DAT A SHEET SPECIFICATIONS. ...

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... Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Slave Address .52 Data Bit Transfer .52 Acknowledge Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 09005aef8154a39d/09005aef8175e6cc MT9V112TOC.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 2 ©2004 Micron Technology, Inc. All rights reserved. PRELIMINARY ...

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... READ Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Two-wire Serial Bus Timing .56 Data Sheet Designation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Revision History .58 09005aef8154a39d/09005aef8175e6cc MT9V112TOC.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 3 ©2004 Micron Technology, Inc. All rights reserved. ...

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... A cknowledge Signal Timing After an 8-bit Read from the Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 Figure 25: 36-Ball ICSP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 09005aef8154a39d/09005aef8175e6cc MT9V112LOF.fm- Rev. A1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 4 ©2004 Micron Technology, Inc. All rights reserved. ...

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... Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Table 21: I/O Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Table 22: Two-Wire Interface ID Address Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 09005aef8154a39d/09005aef8175e6cc MT9V112LOT.fm - Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 5 ©2004 Micron Technology, Inc. All rights reserved. PRELIMINARY MT9V112 ...

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... Both tri-stating output signals and entry in standby mode also can be achieved via two-wire serial interface register writes. The MT9V112 accepts input clocks MHz, delivering fps for VGA resolution images. Internal Architecture Internally, the MT9V112 consists of a sensor core and an image flow processor (IFP) ...

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... Sensor Core NOTE: Internal registers are grouped in three address spaces. Program R240 selects the desired address space. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Example: R240—Page address register. Used when the register address is global in all three pages or when by context the address page is understood. ...

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... D GND NOTE 1.5K: resistor value is recommended, but may be greater for slower two-wire speed. 2. MT9V112 ST ANDBY can be connected to customer’s ASIC controller directly or to Digital GND, depending on the con- troller’s capability. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR together next to the die ...

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... B3, A3, B4 _LSB0 OUT D2 D _LSB1 OUT C5 FRAME_VALID B6 LINE_VALID F2 PIXCLK E3 STROBE E6 A GND B2, C3, C4, D3, D GND D4, E5 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Figure 4: 36-Ball ICSP Assignment OUT OUT OUT ...

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... Q DD NOTE: All inputs and outputs are implemented with bidirectional buffers. Care must be taken that all inputs are driven and all outputs are driven if tri-stated. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR TYPE S upply Analog power: 2.5V–3.1V (2.8V nominal). S upply Pixel array analog power supply: 2.5V– ...

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... Camera Interface and Test Patterns The MT9V112 outputs process video as a standard ITU-R BT .656 stream, an RGB stream processed or unprocessed Bayer data. The ITU-R BT .656 stream contains Y CbCr 4:2:2 data with optional embedded synchronization codes ...

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... A typical example is to use context A for viewfinder/preview settings and context B for snapshots. Functions supporting context switch- ing include: 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR • The resizer (output resolutions for preview and snapshot) • Camera interface (e.g., RGB565 for LCD preview and ...

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... First Second RGB444x First Second RGBx444 First Second T able 6: Output Data Ordering Bypass Mode MODE BYTE bypass First B9 S econd 0 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Cbi Yi Cri Yi Yi Cbi Yi Cri BYTE ...

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... Lens Correction Parameter 14 140 (8C) Lens Correction Parameter 15 141 (8D) Lens Correction Parameter 16 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR 0000 0000 0000 dddd dddd dddd 0ddd dddd 0000 0ddd dddd dddd 0000 0000 00dd dddd dddd dddd dddd dddd ...

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... Lens Correction Parameter 31 189 (BD) Lens Correction Parameter 32 190 (BE) Lens Correction Parameter 33 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR 0ddd dddd dddd dddd Reserved 0000 0ddd dddd dddd 0000 0ddd dddd dddd 0d00 0ddd dddd dddd 0000 0ddd dddd dddd ...

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... Gamma Correction Parameter 10 224 (E0) Gamma Correction Parameter 11 225 (E1) Gamma Correction Parameter 12 226 (E2) Effects Mode 227 (E3) Effects Sepia 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR dddd dddd dddd dddd Reserved dddd dddd dddd dddd Reserved Reserved Reserved Reserved Reserved Reserved ...

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... Auto Exposure Vertical Center Window Boundaries 45 (2D) AWB Window Boundaries 46 (2E) Auto Exposure Target and Precision Control 47 (2F) Auto Exposure Speed and Sensitivity Control—Context A 48 (30) AWB Parameter 11 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DATA FORMAT — — — — — — — ...

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... Auto Exposure Parameter 18 103 (67) Auto Exposure Digital Gain Limits 104 (68) 106 (6A) 107 (6B) 108 (6C) 109 (6D) 110 (6E) 111 (6F) 112 (70) 113 (71) 114 (72) 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Reserved Reserved Flicker Control 0 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved ...

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... Global Context Control 201 (C9) Context Control Parameter 2 202 (CA) Camera Control Sequencer Parameter 203 (CB) Camera Control Sequencer Parameter 2 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved ...

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... Data Format Key “Don't Care” bit. The exceptions: R0:0 and R255:0, which are hardwired R/O binary values R/W bit ? = R/O bit. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Reserved Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 20 ...

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... Auto exposure sampling window is specified by the weighted sum of the large window and the small window, with the small window weighted four times more heavily. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR map register (R/W); R6:1 0x106 operating mode con- trol register (R/W); R8:1 0x108 output format control register (R/W) ...

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... Black and white 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 22 PRELIMINARY MT9V112 ©2004 Micron Technology, Inc. All rights reserved. ...

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... Outputs RGB or YCbCr values are shifted 3 bits up. Use with R58:1[5:4] to test LCDs with low color depth. Bit 2 Averages two nearby chrominance bytes. See R155:1. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 23 ...

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... Output RGB or YCbCr values are shifted 3 bits up. Use with R58:1[5:4] to test LCDs with low color depth. Bit 2 Averages two nearby chrominance bytes. See R58:1 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 24 ...

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... Controls reducer horizontal pan. Pan and Zoom settings are NOT context switchable. The same field of view will be active for both context A and context B. Bit 14 0: MT9V112-compatible offset from Centered origin at 320 for more convenient zoom and resize. Bits 10:0 X Pan: Unsigned offset from (Bit 14 = 0), or two’s complement from X = 320 (Bit 14 = 1). ...

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... By default, this register contains a brownish color, but it can be set to an arbitrary color. Bit 15 Sign of Cb. Bits 14:8 Magnitude 0.7 fixed point. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 26 PRELIMINARY MT9V112 ...

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... Colorpipe Register Description (continued) Bit 7 S ign of Cr. Bits 6:0 Magnitude 0.7 fixed point. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 27 PRELIMINARY MT9V112 ©2004 Micron Technology, Inc. All rights reserved. ...

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... This window is centered on target, but the value programmed in the register is 1/2 of the window size. Bits 15:8 Half-size of the auto exposure stability window/range. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 28 PRELIMINARY MT9V112 © ...

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... Post-lens correction digital gain (writable if auto exposure is disabled). Bits 7:0 Pre-lens correction digital gain (writable if auto exposure is disabled). 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 29 PRELIMINARY MT9V112 © ...

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... This bit is automatically cleared once the restart has occurred not restart sensor. 1: Restart sensor. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 30 PRELIMINARY MT9V112 © ...

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... Context A 1: Context B Bit 0 Horizontal blanking context: 0: Context A 1: Context B 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 31 PRELIMINARY MT9V112 ©2004 Micron Technology, Inc. All rights reserved. ...

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... The additional active column and additional active row are used to enable horizontally and vertically mir- rored readout to start on the same color pixel. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Figure 6: Pixel Array Description 14 Black Rows 12 Black Columns ...

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... V alid image data is surrounded by horizontal blanking and vertical blanking, shown in Figure 8. LINE_V ALID is HIGH during the shaded region of the figure. FRAME_VA LID timing is described in “A ppen- dix A ” on page 52. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Figure 8: Spatial Illustration of Image Readout ...

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... New Black Level Algorithm 89 (0x59) 90 (0x5A) 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR REGISTER NAME Chip Version 0001 0010 0010 1001 (LSB) Row Start Column Start Row Width Column Width 0ddd dddd dddd dddd ...

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... MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR REGISTER NAME Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved ...

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... NOTE: Data Format Key “Don't Care” bit d = R/W bit ? = R/O bit. The exceptions: R0:0 and R255:0, which are hardwired R/O binary values. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR REGISTER NAME Reserved Chip Version 0001 0010 0010 1001 (LSB) 36 PRELIMINARY ...

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... DATA_OUT is set to the falling edge of PIXCLK. When clear, they Clock are set to the rising edge if there is no pixel clock delay. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. ...

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... By default, asserting STANDBY causes the ball interface to enter Drive High-Z. Setting this bit stops ST ANDBY from contributing to Signals output enable control. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 38 PRELIMINARY MT9V112 SYNC’ ...

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... Row Skip 4x 1: READ out two rows, and then skip six rows (i.e., row 8, row 9, row 16, row 17…). 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. ...

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... Reset 1: In Xenon mode, the flash should be triggered after the resetting of a frame. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 40 PRELIMINARY MT9V112 SYNC’ ...

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... Setting this bit causes the sensor to abandon the current frame Restart and start resetting the first row. Same physical register as Reg0x00D, bit 1. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 41 ...

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... Wire Serial Interface Sample” on page 54 and “Appendix A” on page 52. R255:0—0x000 – Chip Version (R/O) Bits 15:0 Hardwired READ only. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DESCRIPTION Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 42 PRELIMINARY MT9V112 SYNC’ ...

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... YM = Yes, but the bad frame is masked out unless the show-bad-frames feature is enabled. Read / Write R = read-only register/bit read / write register/bit. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 43 PRELIMINARY MT9V112 © ...

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... Typically, switching to snapshot mode is achieved by writing R200:2 = 0x9F0B. This restarts the sensor and sets most contexts to context B. Following this 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR WRITE, a READ from R200:1 or R200:2 results in 0x1F0B being read. Note that the MSB is cleared auto- matically by the sensor ...

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... V: Vertical Blanking: [ 08: Total Frame Time: (R0 x 03:0 + [R0 x 06:0 | R00 x 08:0 the MT9V112, the sensor core adds four border pixels all the way around the image, taking the active image size to 648 x 488 in full power mode. This is achieved through the default settings: • ...

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... FRAME_VALID (rising edge) to LINE_VALID (rising edge) delay (B) LINE_VALID (falling edge) to FRAME_VALID (falling edge) delay (C) LINE_VALID (HIGH/valid) time (D) LINE_VALID (LOW/horizontal blanking) time (E) FRAME_VALID (HIGH/valid) time (F) FRAME_VALID (LOW/vertical blanking) time 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR x Figure 10: Vertical Timing Line 0 Line 1 LineN-3 Figure 11: Horizontal Timing FF ...

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... See R13:0 on page 38. When the MT9V112 is operated with the MT9M111 in a dual-camera application, the MT9V112 employs a divide-by-two clock option, allowing a 54 MHz input to the master clock. For more information about this fea- ture, see the R13:0 register description on page 38 in Table 12 ...

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... V , and VAAPIX must all be at the same potential to avoid excessive current draw. Care must be taken to avoid DD AA excessive noise injection in the analog supplies if all three supplies are tied together. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR CONDITION MIN N/A 1.7 N/A 1 ...

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... Signal CAP Input signal capacitance freq Master clock frequency CLKIN Power Consumption T able 20: Power Consumption MODE SENSOR/ m VGA at 15 fps 54 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR DEFINITIONS CONDITION 2.8V, 30pF load 2.8V, 5pF load 1.8V, 30pF load 1.8V, 5pF load 2.8V 1.8V, V ...

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... I/O Timing By default, the MT9V112 launches pixel data, FRAME_VA LID, and LINE_V A LID synchronously with the falling edge of PIX CLK. The expectation is that the user captures data, FRAME_VA LID, and LINE_VALID Tclkin_min_high CLKIN PIXCLK DATA[7:0] FRAME_VALID LINE_VALID T able 21: I/O Timing SIGNAL PARAMETER CLKIN ...

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... Figure 13: Typical Spectral Characteristics (preliminary 350 X increasing NOTE: Figure not to scale. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Quant iciency 450 550 650 750 Wavelength (nm) Figure 14: Image Center Offset 51 PRELIMINARY MT9V112 850 950 ...

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... Registers are written to and read from the MT9V112 through the two-wire serial interface bus. The sensor is a serial interface slave controlled by the serial clock (SCLK), which is driven by the serial interface master. Data is transferred in and out of the MT9V112 through the serial data (S ) line. The S DATA off-chip ...

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... LOW during the acknowledge clock pulse. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR No-Acknowledge Bit The no-acknowledge bit is generated when the data line is not pulled down by the receiver during the acknowledge clock pulse ...

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... S DATA 0xBA Address Start ACK 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR expects the register address to come first, followed by the 16-bit data. After each 8-bit transfer, the image = 1). sensor sends an acknowledge bit. All 16 bits must be written before the register is updated. After 16 bits are ...

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... DATA • • 0xBA Address Start 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR address (R0xF1:0). The register is not updated until all 16 bits have been written not possible to update just half of a register. In Figure 17, a typical sequence for an 8-bit WRITE is shown. The second byte is writ- ten to the special register (R0xF1:0) ...

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... S DATA NOTE: After a read, the master receiver must pull down S plete, the master must generate a no acknowledge by leaving S bit may be used. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Figure 21: Serial Host Interface Data S DATA NOTE driven by an off-chip transmitter. ...

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... E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm - Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Figure 25: 36-Ball ICSP Package 0.95 (FOR REFERENCE ONLY) 1.17 ± ...

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... Revision History • Original Document, Rev A, Preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11/04 09005aef8154a39d/09005aef8175e6cc MT9V112_2.fm- Rev. A 1/05 EN SOC VGA DIGITAL IMAGE SENSOR Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice. 58 PRELIMINARY MT9V112 ©2004 Micron Technology, Inc. All rights reserved. ...