mt9v112 Micron Semiconductor Products, mt9v112 Datasheet - Page 42

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mt9v112

Manufacturer Part Number
mt9v112
Description
1/6-inch Soc Vga Cmos Digital Image Sensor
Manufacturer
Micron Semiconductor Products
Datasheet

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T able 12: Sensor Core Register Descriptions (continued)
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
Bit 7
Xenon Flash
Enable
Bit 3
Read Mode
Select
Bit 2
LED Flash
Enable
Bit 1
Vertical
Blanking
Select
Bit 0
Horizontal
Blanking
Select
R240:0—0x0F0 – Page Map
Bits 2:0
Page Map
R241:0—0x0F1 – Byte-Wise Address
Bit 0
Byte-Wise
Address
R255:0—0x000 – Chip Version (R/O)
Bits 15:0
BIT FIELD
Enable Xenon flash. Same physical register as Reg0x023, bit 13.
0: Use READ mode, context A, Reg0x021.
1: Use READ mode, context B, Reg0x020.
Note that bits found only in the READ mode context B register is
always taken from that register.
Enable LED flash. Same physical register as Reg0x023, bit 8.
0: Use vertical blanking, context A, Reg0x008.
1: Use vertical blanking, context B, Reg0x006.
0: Use horizontal blanking, context A, Reg0x007.
1: Use horizontal blanking, context B, Reg0x005.
Page mapping register. Must be kept at 0 to be able to WRITE
to/READ from sensor. Used in the S OC to access other pages with
registers.
Special address to perform 8-bit (instead of 16-bit) READs and
WRITEs to the sensor. For additional information, see “Two-
Wire Serial Interface Sample” on page 54 and “Appendix A” on
page 52.
Hardwired READ only.
DESCRIPTION
42
SOC VGA DIGITAL IMAGE SENSOR
Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice.
DEFAULT
0x1229
(HEX)
N/A
0x0
0x1
0x0
0x1
0x1
0x0
SYNC’D TO
FRAME
START
©2004 Micron Technology, Inc. All rights reserved.
Y
Y
Y
Y
Y
N
0
PRELIMINARY
MT9V112
FRAME
BAD
YM
YM
YM
N
Y
0
0
WRITE
READ/
W
W
W
W
W
W
0
R

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