npe405h Applied Micro Circuits Corporation (AMCC), npe405h Datasheet - Page 49

• Manufacturer Part Number: npe405h
• Description: Powernp Npe405h Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

NPe405H – PowerNP NPe405H Embedded Processor
Table 6. Signal Functional Description (Sheet 7 of 9)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-up and Pull-down Resistors” on page 42 for recommended termination values.
3. Must pull down. See “Pull-up and Pull-down Resistors” on page 42 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Peripheral Bus Control Signals” on page 42.
AMCC Proprietary
External Master Peripheral Interface
Internal Peripheral Interface
[UART0_DCD]
[UART0_DSR]
[UART0_CTS]
[UART0_DTR]
[UART0_RTS]
Signal Name
UARTSerClk
[UART0_RI]
UART0_Rx
UART0_Tx
ExtReset
HoldReq
HoldAck
BusReq
ExtReq
HoldPri
ExtAck
Peripheral Reset. Used by an external master and
synchronous peripheral slaves.
Hold Request. Used by an external master to request
ownership of the peripheral bus.
Hold Acknowledge. Used by the NPe405H to transfer
ownership of peripheral bus to an external master.
External Request. Used by an external master to indicate it is
prepared to transfer data.
External Acknowledgement. Used by the NPe405H to
indicate that a data transfer occurred.
Hold Primary. Used by an external master to indicate the
priority of a given transfer (0 = high, 1 = low).
Bus Request. Used when the NPe405H needs to regain
control of peripheral interface from an external Master.
Serial Clock used to provide an alternative clock to the
internally generated serial clock. Used in cases where the
allowable internally generated baud rates are not satisfactory.
This input can be individually connected to either or both
UART0 and UART1.
UART0 Receive data.
UART0 Transmit data.
UART0 Data Carrier Detect.
UART0 Data Set Ready.
UART0 Clear To Send.
UART0 Data Terminal Ready.
UART0 Request To Send.
UART0 Ring Indicator.
Description
Revision 1.02 – November 16, 2007
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
3.3V LVTTL r
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
Type
Data Sheet
DS2011
Notes
1, 5
6
1
6
1
1
1
1
1
1
1
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