npe405h Applied Micro Circuits Corporation (AMCC), npe405h Datasheet - Page 50
npe405h
Manufacturer Part Number
npe405h
Description
Powernp Npe405h Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
1.NPE405H.pdf
(70 pages)
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NPe405H – PowerNP NPe405H Embedded Processor
Table 6. Signal Functional Description (Sheet 8 of 9)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-up and Pull-down Resistors” on page 42 for recommended termination values.
3. Must pull down. See “Pull-up and Pull-down Resistors” on page 42 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Peripheral Bus Control Signals” on page 42.
50
Interrupts Interface
JTAG Interface
DS2011
IICSDA[IECSDA]
IICSCL[IECSCL]
[UART1_DCD]
[UART1_DSR]
[UART1_CTS]
[UART1_DTR]
[UART1_RTS]
Signal Name
[UART1_RI]
UART1_Rx
UART1_Tx
[IRQ0:6]
TRST
TMS
TDO
TCK
TDI
UART1 Receive data.
UART1 Transmit data.
UART1 Data Carrier Detect.
UART1 Data Set Ready.
UART1 Clear To Send.
UART1 Data Terminal Ready.
UART1 Request To Send.
UART1 Ring Indicator.
IIC [Initilization PROM] Serial Clock.
IIC [Initilization PROM] Serial Data.
Interrupt Requests.
Test Data In.
Test Mode Select.
Test Data Out.
Test Clock.
Test Reset. TRST must be low at power-on to reset the JTAG
boundary scan state machine.
Description
Revision 1.02 – November 16, 2007
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
Type
Data Sheet
AMCC Proprietary
Notes
1, 4
1, 4
1, 4
1, 4
1, 2
1, 2
1, 4
1, 4
1, 4
1
6
1
5
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