w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 36

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

7.2.7 Test Functions
The W6692 provides loop and test functions as follows:
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Digital loop via DLP bit in D_MODE register: In the layer 2 block, the transmitted 2B+D data are internally
looped (from HDLC transmitter to HDLC receiver), and in the PCM ports, the transmitted B channels are
internally looped (from PCM inputs to PCM outputs). The clock timings are generated internally and are
independent of the S bus timing. This loop function is used for test of PCM and higher layer functions, excluding
layer 1. After hardware reset, W6692 will power down if S bus is not connected or if there is no signal on the S
bus. In this case, the C/I command ECK must be issued to power up the chip.
Analog loop via the C/I command EAL: The analog S interface transmitter is internally connected to the S
interface receiver. When the receiver has synchronized itself to the internal INFO 3 signal, the message "Test
Indication" or "Awake Test Indication" is delivered to the CIR register. No signal is transmitted over the S
interface.
In this mode, the S interface awake detector is enabled. Therefore if a level (INFO 2/ INFO 4) is detected on the S
interface, this will be reported by the "Awake Test Indication (ATI)" indication.
Remote loopback via RLP bit in D_MODE register: The digital 2B data received from the S interface receiver is
loopbacked to the S interface transmitter. The D channel is not looped. When RLP is enabled, layer 1 D channel is
connected to HDLC port and DLP cannot be enabled.
Transmission of special test signals via layer 1 command:
time, 250 us apart, with a repetition frequency of 2 kHz.
The repetition frequency is 96 kHz.
etc.
1
2
* Send Single Pulses (SSP): To send isolated single pulses of alternating polarity, with pulse width of one bit
* Send Continuous Pulses (SCP): To send continuous pulses of alternating polarity, with pulse width of bit time.
250 us
ZERO
ONE
ZERO
ONE
(a) Single pulses
(b) Continuous pulses
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ZERO
S1
ZERO
W6692 PCI ISDN S/T-Controller
Q1
Publication Release Date:
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9