w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 68

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w6692

Manufacturer Part Number
w6692
Description
Pci Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
MRC0
interrupt
MXIE0
MXC0
8.1.32 GCI Mode Control/Status Register
7CH/1FH
Value after reset: 00H
MAC0
to 1.
MOX) in
MAC1
to 1.
MOX) in
TLP
function: DOUT is internally connected with DIN, external input on
MAC0
7
Test Loop
When set this bit to 1 both the DOUT and DIN lines are internally connected together. The GCI mode loop-back test
MR Bit Control
MX bit Control
Monitor Transmit Channel 0 Active (Read Only)
Monitor Transmit Channel 1 Active (Read Only)
Monitor channel 0 Transmit Interrupt Enable
MAC1
Data transmission is in progress in GCI mode Monitor channel 0.
0: the previous transmission has been terminated. Before starting a transmission, the microprocessor should verify
1: after having written data into the Monitor Transmit Channel 0 (MO0X) register, the microprocessor sets this bit
Data transmission is in progress in GCI mode Monitor channel 1.
0: the previous transmission has been terminated. Before starting a transmission, the microprocessor should verify
1: after having written data into the Monitor Transmit Channel 1 (MO1X) register, the microprocessor sets this bit
Determines the value of the MR bit:
0: MR bit always 1. In addition, the MDR0 interrupt is blocked, except for the first byte of a packet (if MRE=1).
1: MR internally controlled by the W6692 according to Monitor channel protocol. In addition, the MDR0
0: MX always 1.
1: MX internally controlled by the W6692 according to Monitor channel protocol.
Determines the value of the MX bit:
Monitor channel interrupt status MDR0, MER0 generation is enabled (1) or masked (0).
Monitor interrupt status MDA0, MAB0 generation is enabled (1) or masked (0).
6
This enables the MX bit to go active (0), indicating the presence of valid Monitor channel data (contents of
This enables the MX bit to go active (0), indicating the presence of valid Monitor channel data (contents of
is enabled for all received bytes according to the Monitor channel protocol (if MRE=1).
that the transmitter is inactive.
the correspond frame.
that the transmitter is inactive.
the correspond frame.
5
TLP
4
GRLP
3
SPU
2
-68 -
GCR
PD
DIN is ignored.
1
GMODE
W6692 PCI ISDN S/T-Controller
0
Publication Release Date:
Read/Write
Preliminary Data Sheet
Address
Sep 30, 1999
Revision 0.9

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