w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 66
w6692
Manufacturer Part Number
w6692
Description
Pci Bus Isdn S/t-controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W6692.pdf
(104 pages)
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OE4
OE3
OE2
OE1
OE0
XMODE
XADDR register is used for peripheral address generation and XDATA register is used for peripheral data access.
PXC
independent of the BSW1-0 bits.
8.1.28 Monitor Receive Channel 0
Used when XMODE=0 only.
Used when XMODE=0 only.
Used when XMODE=0 only.
Used when XMODE=0 only.
Used when XMODE=0 only.
This bit determines whether or not the PCM ports are cross-connected with the B channel ports. The setting of PXC is
0: Pin IO10's output driver is disabled.
1: Pin IO10's output driver is enabled.
0: Pin IO9-8's output drivers are disabled.
1: Pin IO9-8's output drivers are enabled.
0: Pin IO7-6's output drivers are disabled.
1: Pin IO7-6's output drivers are enabled.
0 : Pin IO5-4's output drivers are disabled.
1 : Pin IO5-4's output drivers are enabled.
0 : Pin IO3-2's output drivers are disabled.
1 : Pin IO3-2's output drivers are enabled.
0 : Pin IO1-0's output drivers are disabled.
1 : Pin IO1-0's output drivers are enabled.
0: Simple programmable IO. This is the default state. XADDR register and XDATA register are used for data access.
1: 8-bit multiplexed microprocessor bus. Pins IO7-0 are used as XAD7-0, IO8 as XALE, IO9 as XRDB and IO10 as XWRB.
Direction Control for IO9-8
Direction Control for IO7-6
Direction Control for IO5-4
Direction Control for IO3-2
Direction Control for IO1-0
PCM Cross-connect
Peripheral Bus Mode
PXC
0
1
PCM1
PCM1
B1, PCM2
B2, PCM2
Connection
B2
B1
MO0R
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W6692 PCI ISDN S/T-Controller
Publication Release Date:
Address 6CH/1BH
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9
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