emc643sp16ak Emlsi Inc., emc643sp16ak Datasheet - Page 23

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emc643sp16ak

Manufacturer Part Number
emc643sp16ak
Description
4mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
BUS CONFIGURATION REGISTER
The BCR defines how the CellularRAM device interacts with the system memory bus. Figure 15 describes the control bits in the BCR. At
power-up, the BCR is set to 9D1Fh. The BCR is accessed with CRE HIGH and A[19:18] = 10b, or through the register access software
sequence with A/DQ = 0001h on the third cycle.
Figure 15: Bus Configuration Register Definition
1. Burst wrap and length apply to both READ and WRITE operations.
2. Reserved bits must be set to zero. Reserved bits not set to zero will affect device functionality. BCR[15:0] will be read back as written.
All must be set to “0”
Note:
BCR[19]
Reserved
[21:20]
21-20
A
0
1
0
BCR[15]
BCR[18]
[19:18]
Register
Select
19-18
A
0
1
0
0
1
Must be set to “0”
Synchronous burst access mode
Asynchronous access mode (default)
Select RCR
Select BCR
Select DIDR
BCR[14]
BCR[13]
Reserved
[17:16]
Register Select
17-16
0
1
0
0
0
0
1
1
1
1
A
Variable (default)
Fixed
BCR[12]
Operating
Operating Mode
A/DQ
Mode
15
0
0
1
1
0
0
1
1
15
Initial Access Latency
BCR[11]
Latency
A/DQ
Initial
14
14
0
1
0
1
0
1
0
1
Code 8
Code 1 - Reserved
Code 2
Code 3 (default)
Code 4
Code 5
Code 6
Code 7 - Reserved
13
BCR[10]
[13:11]
Counter
Latency
0
1
A/DQ
12
Latency Counter
Active LOW
Active HIGH (default)
11
Polarity
A/DQ
WAIT
10
10
WAIT Polarity
Must be set to “0”
23
Reserved
A/DQ
9
9
Configuration(WC)
Must be set to “0”
A/DQ
WAIT
8
8
BCR[3]
BCR[5] BCR[4]
BCR[8]
BCR[2] BCR[1]
0
1
0
0
1
1
0
1
0
0
0
1
1
Burst no wrap (default)
Asserted during delay
Asserted one data cycle before delay (default)
Burst wraps within the burst length
Others
Must be set to “0”
Reserved
0
1
0
1
0
1
1
0
1
A/DQ
4Mx16 CellularRAM AD-MUX
7
7
Full
1/2 (default)
1/4
Reserved
BCR[0]
Burst Wrap (Note 1)
WAIT Configuration
EMC643SP16AK
Reserved
Drive Strength
1
0
1
0
1
A/DQ
6
6
4 words
8 words
16 words
32 words
Continuous burst (default)
Reserved
Strength
5
A/DQ
[5:4]
Drive
Burst Length (Note 1)
4
Wrap(BW)
A/DQ
Burst
3
3
Length(BL)
2
A/DQ
[2:0]
Burst
1 0

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