emc643sp16ak Emlsi Inc., emc643sp16ak Datasheet - Page 41

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emc643sp16ak

Manufacturer Part Number
emc643sp16ak
Description
4mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
Figure 28: Burst READ Terminate at End-of-Row (Wrap Off)
Notes :
1. Non-default BCR settings for burst READ at end of row : fixed or variable latency, WAIT active LOW; WAIT asserted during delay.
2. For burst READs, CE# must go HIGH before the second CLK after the WAIT period begins ( before the second CLK after WAIT asserts with BCR[8]=0, or before the third
CLK after WAIT asserts with BCR[8]=1 ).
A/DQ[15:0]
UB#/LB#
A[21:16]
ADV#
WAIT
CLK
CE#
OE#
WE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
OH
OL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
t
CLK
Output
Valid
t
t
KOH
KHTL
Output
Valid
t
HD
End of row
t
HZ
Note 2
41
t
CSP
t
HZ
4Mx16 CellularRAM AD-MUX
Don’t Care
EMC643SP16AK
High-Z
Undefined

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