hsd2m64b2 ETC-unknow, hsd2m64b2 Datasheet - Page 4

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hsd2m64b2

Manufacturer Part Number
hsd2m64b2
Description
Synchronous Dram Module 16mbyte 2mx64-bit , So-dimm, 4banks, Ref., 3.3v
Manufacturer
ETC-unknow
Datasheet
HANBit
PIN FUNCTION DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
Notes:
Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
URL:www.hbe.co.kr
REV.1.0 (August.2002)
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
Short Circuit Output Current
BA0 ~ BA1
DQM0 ~ 7
VDD/VSS
DQ0 ~ 63
A0 ~ A11
/RAS
/CAS
CLK
CKE
/WE
/CE
Pin
Bank select address
Row address strobe
Data input/output
Data input/output
Column address
supply/ground
System clock
Clock enable
PARAMETER
Write enable
Chip enable
Address
strobe
Power
Name
mask
Active on the positive going edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except
CLK, CKE and DQM
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
CKE should be enabled 1CLK+tSS prior to valid command.
Row/column addresses are multiplexed on the same pins.
Row address : RA0 ~ RA11, Column address : CA0 ~ CA8
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
Latches column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
Enables write operation and row precharge.
Latches data in starting from CAS, WE active.
Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when DQM active. (Byte masking)
Data inputs/outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
SYMBOL
4
V
T
IN ,OUT
Vcc
I
P
STG
OS
D
Input Function
-55 o C to 150 o C
-1V to 4.6V
-1V to 4.6V
RATING
100mA
HANBit Electronics Co.,Ltd.
2W
HSD2M64B2

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