A43E06161V AMICC [AMIC Technology], A43E06161V Datasheet - Page 28

• Manufacturer Part Number: A43E06161V
• Description: 512K X 16 Bit X 2 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

PRELIMINARY
Page Write Cycle at Different Bank @Burst Length=4
CLOCK
A10/AP
ADDR
* Note:
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and precharge banks must be the same.
RAS
CAS
DQM
CKE
DQ
CS
BA
WE
Row Active with
0
(A-Bank)
RAa
RAa
1
(July, 2005, Version 0.1)
2
3
(A-Bank)
DAa0 DAa1 DAa2
CAa
Write
4
Row Active
(B-Bank)
RBb
RBb
5
6
DAa3
7
t
CDL
(B-Bank)
Write
DBb0
CBb
8
DBb1
27
9
High
DBb2 DBb3 DAc0
10
11
(A-Bank)
CAc
Write
12
DAc1
13
(B-Bank)
DBd0 DBd1
Write
CBd
14
AMIC Technology, Corp.
*Note 1
15
t
RDL
16
(Both Banks)
Precharge
*Note 2
17
A43E06161
: Don't care
18
19