A43E06161V AMICC [AMIC Technology], A43E06161V Datasheet - Page 8

• Manufacturer Part Number: A43E06161V
• Description: 512K X 16 Bit X 2 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

Operating AC Parameter
(AC operating conditions unless otherwise noted)
Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
PRELIMINARY
Symbol
t
t
t
t
t
t
t
t
t
RAS(max)
t
RRD(min)
RCD(min)
RAS(min)
CDL(min)
RDL(min)
BDL(min)
CCD(min)
RP(min)
RC(min)
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
then rounding off to the next higher integer.
Row active to row active delay
Row precharge time
Row active time
Row cycle time
Last data in new col. Address delay
Last data in row precharge
Last data in to burst stop
Col. Address to col. Address delay
RAS to
(July, 2005, Version 0.1)
CAS
delay
Parameter
7
-75
7.5
7.5
7.5
27
27
57
84
2
2
Version
100
AMIC Technology, Corp.
28.5
28.5
85.5
-95
8.5
9.5
9.5
57
2
2
Unit
CLK
CLK
A43E06161
ns
ns
ns
µ s
ns
ns
ns
ns
Note
1, 2
1
1
1
1
1
2
2