em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 139

• Manufacturer Part Number: em78f644nso28s
• Description: Flash Series 8-bit Microcontroller
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.0) 05.05.2010
(This specification is subject to change without further notice)
The Sleep (power down) mode is asserted by executing the “SLEP” instruction.
While entering Sleep mode, the WDT (if enabled) is cleared but keeps on running
until wake-up is triggered by one of the following events (wake-up time in RC mode is
34clocks, in High XTAL mode is 2ms + 32clocks, and in Low XTAL mode, is 500ms):
Event 1) External reset input on /RESET pin
Event 2) WDT time-out (if enabled)
Event 3) External (P60,/INT) pin changes (if EXWE is enabled)
Event 4) Port 6 input status changes (if ICWE is enabled)
Event 5) Comparator 1/2 output status changes (if CMP1WE/CMP2WE is enabled)
Event 6) SPI receives data while SPI is acting as Slave device (if SPIWE is enabled)
Event 7) Port 5/Port 7 input status changes (if corresponding control bits are enabled)
The first two cases will cause the EM78F648N/F548N to reset. The T and P flags of
R3 can be used to determine the source of the reset (wake-up). Events 3,4,5,6, & 7
are considered as the continuation of program execution and the global interrupt
("ENI" or "DISI" being executed) decides whether or not the controller branches to the
interrupt vector following a wake-up. If ENI is executed before SLEP, the instruction
will begin to execute from Address 0x3, 0x6, 0X15, 0X30 after wake-up. If DISI is
executed before SLEP, the execution will restart from the instruction right next to
SLEP after wake-up. All of the Sleep mode wake-up time is 150µs, regardless of
what the status is of the oscillation mode (except for Low XTAL mode which has a
wake-up time of 500ms).
Only one of Events 2 to 7 can be enabled before entering into Sleep mode. That is-
a) If WDT is enabled before SLEP, the EM78F648N/F548N can wake-up only by
b) If External (P60, /INT) pin change is used to wake-up EM78F648N/F548N and the
c) If Port 6 Input Status Change is used to wake-up EM78F648N/F548N and the
d) If Comparator 1/2 Output Status Change is used to wake-up EM78F648N/F548N
e) When SPI is acting as Slave device, EM78F648N/F548N will wake-up after
f) If Ports 6 & 7 Input Status Change is used to wake-up EM78F648N/F548N and the
Events 1 or 2. Refer to the Interrupt section (Section 12) for further details.
EXWE bit is enabled before SLEP, the WDT must be disabled. Hence, the
controller can wake-up only under Event 3 condition.
corresponding wake-up setting is enabled before SLEP, the WDT must be
disabled. Hence, the controller can wake-up only under Event 4 condition.
and the CMP1WE/CMP2WE bit of Bank0 R2F register is enabled before SLEP,
the WDT must be disabled by software. Hence, the controller can wake-up only
under Event 5 condition.
receiving data, and the SPIWE bit of Bank0 R2F register is enabled before SLEP,
the WDT must be disabled by software. Hence, the controller can wake-up only
under Event 6 condition.
corresponding wake-up setting is enabled before SLEP, the WDT must be
disabled. Hence, the controller can wake-up only under Event 7 condition.
EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
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