em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 28

• Manufacturer Part Number: em78f644nso28s
• Description: Flash Series 8-bit Microcontroller
• Manufacturer: ELAN Microelectronics Corp

EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
18 •
6.1.11 Bank 0 RA (Wake-up Control Register)
Bit 7 (CMP2WE): Comparator 2 wake-up enable bit
Bit 6 (ICWE):
Bit 5:
Bit 4 (EXWE):
Bit 3 (SPIWE): SPI Wake-up enable bit when SPI acts as Slave device
Bits 2 ~ 0:
6.1.12 Bank 0 RB (EEPROM Control Register)
Bit 7 (RD):
Bit 6 (WR):
CMP2WE
Bit 7
Bit 7
RD
F642/542N, Bit 3 is unused. Set to “0” all the time.
For F641/541N, Bit 3 is unused. Set to “0” all the time.
ICWE
Bit 6
Bit 6
WR
0: Disable Comparator 2 Wake-up
1: Enable Comparator 2 Wake-up
When the Comparator 2 Output Status Change is used to enter an
interrupt vector or to Wake-up the IC from Sleep, the CMP2WE bit
must be set to “Enable“.
0: Disable Port 6 input status change Wake-up
1: Enable Port 6 input status change Wake-up
0: Disable External /INT pin Wake-up
1: Enable External /INT pin Wake-up
0: Disable SPI Wake-up when SPI acts as Slave device
1: Enable SPI Wake-up when SPI acts as Slave device
Read control register
0: Disable EEPROM read execution
1: Read EEPROM contents (RD can be set by software. RD is
Write control register
0: Write cycle to the EEPROM is completed.
1: Initiate a write cycle (WR can be set by software. WR is cleared
Port 6 input status change wake-up enable bit
Not used, set to “0” all the time
External /INT wake-up enable bit
Not used, set to “0” all the time.
cleared by hardware after Read instruction is completed).
by hardware after Write cycle is completed).
EEWE
Bit 5
Bit 5
-
EXWE
EEDF
Bit 4
Bit 4
(This specification is subject to change without further notice)
NOTE
SPIWE
EEPC
Bit 3
Bit 3
Product Specification (V1.0) 05.05.2010
Bit 2
Bit 2
-
-
Bit 1
Bit 1
-
-
Bit 0
Bit 0
-
-