hm5216805 Renesas Electronics Corporation., hm5216805 Datasheet - Page 12

• Manufacturer Part Number: hm5216805
• Description: 16 M Lvttl Interface Sdram 100 Mhz/83 Mhz 1-mword 8-bit 2-bank/2-mword 4-bit 2-bank - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

HM5216805 Series, HM5216405 Series
CKE Truth Table
Current state
Active
Any
Clock suspend Clock suspend mode exit
Idle
Idle
Idle
Self refresh
Power down
Note: H: V
Clock suspend mode entry: The synchronous DRAM enters clock suspend mode from active mode by
setting CKE to Low. The clock suspend mode changes depending on the current status (1 clock before) as
shown below.
ACTIVE clock suspend: This suspend mode ignores inputs after the next clock by internally maintaining
the bank active status.
READ suspend and READ A suspend: The data being output is held (and continues to be output).
WRITE suspend and WRIT A suspend: In this mode, external signals are not accepted. However, the
internal state is held.
Clock suspend: During clock suspend mode, keep the CKE to Low.
Clock suspend mode exit: The synchronous DRAM exits from clock suspend mode by setting CKE to
High during the clock suspend state.
IDLE: In this state, all banks are not selected, and completed precharge operation.
Auto-refresh command [REF]: When this command is input from the IDLE state, the synchronous
DRAM starts auto-refresh operation. (The auto-refresh is the same as the CBR refresh of conventional
DRAMs.) During the auto-refresh operation, refresh address and bank select address are generated inside
the synchronous DRAM.
Accordingly, 4096 times are required to refresh the entire memory. Before executing the auto-refresh
command, all the banks must be in the IDLE state. In addition, since the precharge for all banks is
automatically performed after auto-refresh, no precharge command is required after auto-refresh.
12
IH
. L: V
Function
Clock suspend mode entry
Clock suspend
Auto-refresh command REF
Self-refresh entry
Power down entry
Self refresh exit
Power down exit
IL
. : V
IH
or V
For every auto-refresh cycle, the internal address counter is updated.
IL
.
SELFX
SELF
CKE
n – 1 n
H
L
L
H
H
H
H
L
L
L
L
L
L
H
H
L
L
L
H
H
H
H
CS
H
L
L
L
H
L
H
L
H
RAS
L
L
H
H
H
CAS
L
L
H
H
H
WE
H
H
H
H
H
Address