hm5216805 Renesas Electronics Corporation., hm5216805 Datasheet - Page 16

• Manufacturer Part Number: hm5216805
• Description: 16 M Lvttl Interface Sdram 100 Mhz/83 Mhz 1-mword 8-bit 2-bank/2-mword 4-bit 2-bank - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

HM5216805 Series, HM5216405 Series
Current state
Write with auto-
precharge
Refresh (auto-
refresh)
Notes: 1. H: V
From [PRECHARGE]
To [DESL], [NOP] or [BST]: When these commands are executed, the synchronous DRAM enters the
IDLE state after t
From [IDLE]
To [DESL], [NOP], [BST], [PRE] or [PALL]: These commands result in no operation.
To [ACTV]: The bank specified by the address pins and the ROW address is activated.
To [REF], [SELF]: The synchronous DRAM enters refresh mode (auto-refresh or self-refresh).
To [MRS]: The synchronous DRAM enters the mode register set cycle.
16
2. An interval of t
3. If t
The other combinations are inhibit.
RRD
IH
CS
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
is not satisfied, this operation is illegal.
RP
. L: V
has elapsed from the completion of precharge.
IL
RAS CAS WE
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
. : V
DPL
is required between the final valid data input and the precharge command.
IH
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
or V
IL
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
.
Address
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
MODE
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
MODE
Command
DESL
NOP
BST
READ/READ A
WRIT/WRIT A
ACTV
PRE, PALL
REF, SELF
MRS
DESL
NOP
BST
READ/READ A
WRIT/WRIT A
ACTV
PRE, PALL
REF, SELF
MRS
Operation
Continue burst to end and
precharge
Continue burst to end and
precharge
ILLEGAL
ILLEGAL
ILLEGAL
Other bank active
ILLEGAL on same bank
ILLEGAL
ILLEGAL
ILLEGAL
Enter IDLE after t
Enter IDLE after t
Enter IDLE after t
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
RC
RC
RC
*3