hm5216805 Renesas Electronics Corporation., hm5216805 Datasheet - Page 18

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hm5216805

Manufacturer Part Number
hm5216805
Description
16 M Lvttl Interface Sdram 100 Mhz/83 Mhz 1-mword 8-bit 2-bank/2-mword 4-bit 2-bank - Hitachi Semiconductor
Manufacturer
Renesas Electronics Corporation.
Datasheet

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HM5216805 Series, HM5216405 Series
From [WRITE]
To [DESL], [NOP]: These commands continue write operations until the burst operation is completed.
To [BST]: This command stops a full-page burst.
To [READ], [READ A]: These commands stop a burst and start a read cycle.
To [WRIT], [WRIT A]: These commands stop a burst and start the next write cycle.
To [ACTV]: This command makes the other bank active. (However, an interval of t
is required.)
RRD
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]: These commands stop burst write and the synchronous DRAM then enters precharge
mode.
From [WRITE with AUTO-PRECHARGE]
To [DESL], [NOP]: These commands continue write operations until the burst is completed, and the
synchronous DRAM enters precharge mode.
To [ACTV]: This command makes the other bank active. (However, an interval of t
is required.)
RC
Attempting to make the currently active bank active results in an illegal command.
From [REFRESH]
To [DESL], [NOP]: After an auto-refresh cycle (after t
), the synchronous DRAM automatically enters
RC
the IDLE state.
18

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