MK50H25DIP ST Microelectronics, Inc., MK50H25DIP Datasheet - Page 27

• Manufacturer Part Number: MK50H25DIP
• Description: High Speed Link Level Controller
• Manufacturer: ST Microelectronics, Inc.

4.2.1 Mode Register
The Mode Register allows alteration of the MK50H25’s operating parameters.
BIT
15:11 MFS<4:0>
10
09
08
07
06
05
NUMBER OF FLAGS
NAME
EXTCF
EXTAF
EXTC
EXTA
DRFCS
DACE
IADR + 00
10
12
14
16
18
20
22
24
26
28
30
1
2
4
6
8
1
5
1
4
<4:0>
DESCRIPTION
Minimum Frame Spacing defines the minimum number of flag
sequences transmitted
MK50H25. This only affects frames transmitted by the MK50H25
and does not restrict the spacing of the frames received by the
MK50H25.
number of flags
CTS is driven low (minus one for the trailing flag). See the following
table for encoding of this field.
Extended Control Force. If set along with EXTC, the receiver will assume
the control field to be two octets long regardless of the first two bits of
the control field. See EXTC below.
Extended Address Force. If set along with EXTA, the receiver will
assume the address to be two otets long regardless of the first bit of
the address. See EXTA below.
Address and control field extraction are disabled when DACE is set
Address and control fields are treated as data and placed in memory
as such. DACE must be written with ”1” for normal transparent data
transfer operation, but can be set to ”0” for doing address and control
field filtering.
Extended Control Field filtering is enabled when EXTC = 1 if DACE = 0
and PROM = 0 (PROM is in CSR2).
Extended Address Field filtering is enabled when EXTA = 1 if DACE = 0
and PROM = 0 (PROM is in CSR2).
Disable Receiver FCS (CRC). When DRFCS = 0, the receiver will extract
and check the FCS field at the end of each frame. When DRFCS = 1,
the receiver continues to extract the last 16 or 32 bits of each frame,
MFS
1
3
MFS<4:0>
1
2
18
11
22
12
25
19
15
31
30
1
0
2
4
9
5
7
1
1
When using RTS/CTS control this field defines the
1
0
E
X
T
C
F
0
9
E
X
T
A
F
transmitted at the beginning of the frame after
0
8
D
A
C
E
between adjacent frames transmitted by the
0
7
E
X
T
C
NUMBER OF FLAGS
E
X
T
A
0
6
0
5
S
D
R
F
C
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
0
4
D
T
F
C
S
0
3
F
C
S
S
0
2
LBACK
<2:0>
0
1
0
0
MFS<4:0>
MK50H25
28
24
17
13
27
23
14
29
26
21
10
20
16
3
6
8
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