k4d551638h Samsung Semiconductor, Inc., k4d551638h Datasheet - Page 12

• Manufacturer Part Number: k4d551638h
• Description: 256mbit Gddr Sdram
• Manufacturer: Samsung Semiconductor, Inc.

Note 1 : In case of differential clocks(CK and CK), input reference voltage for clock is a CK and CK’s crossing point.
K4D551638H
9.3 AC INPUT OPERATING CONDITIONS
9.4 AC OPERATING TEST
Recommended operating conditions(Voltage referenced to V
Note :
1. V
2. The value of V
Input reference voltage for CK(for single ended)
CK and CK signal maximum peak swing
CK signal minimum slew rate
Input Levels(VIH/VIL)
Input timing measurement reference level
Output timing measurement reference level
Output load condition
Input High (Logic 1) Voltage; DQ
Input Low (Logic 0) Voltage; DQ
Clock Input Differential Voltage; CK and CK
Clock Input Crossing Point Voltage; CK and CK
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
IX
is expected to equal 0.5*V
Parameter
Parameter
Output
DDQ
of the transmitting device and must track variations in the DC level of the same.
Symbol
V
V
V
V
(Fig. 1) Output Load Circuit
IH
ID
IX
IL
SS
Z0=50Ω
=0V, V
- 12 -
C
0.5*
LOAD
V
DD
REF
V
/V
VDDQ
Min
REF
0.7
=30pF
DDQ
+0.35
-
+0.35/V
0.50*V
-0.2
See Fig.1
=2.35V ~ 2.7V,T
Value
V
V
1.5
1.0
V
REF
tt
tt
=0.5*V
DDQ
REF
R
T
=50Ω
-0.35
Typ
-
-
-
-
DDQ
V
=0.5*V
REF
A
=0 to 65°C)
256M GDDR SDRAM
0.5*V
DDQ
(V
V
V
DD
REF
DDQ
Max
DDQ
=2.35V ~ 2.7V, TA= 0 to 65°C)
-
-0.35
+0.6
Rev. 1.3 April 2007
+0.2
Unit
V/ns
V
V
V
V
V
Unit
V
V
V
V
Note
1
Note
1
2