com90c66 Standard Microsystems Corp., com90c66 Datasheet - Page 73

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com90c66

Manufacturer Part Number
com90c66
Description
Arcnet Controller/transceiver With At Interface And On-chip Ram Corporation
Manufacturer
Standard Microsystems Corp.
Datasheet

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AEN
A0-A15,
nSBHE
BALE
nIOR
D0-D7
D0-D15
nTOPH,
nTOPL
nIOCS16
*
**
For latched addresses, t1 and t2 do not apply. Please refer to Figure 21 for Latched Address
Mode.
130 nS minimum inactive time on consecutive reads from Data Register of the COM90C66.
t10
t1
t2
t3
t4
t5
t6
t7
t8
t9
or
Address, nSBHE Set Up to BALE Low *
Address, nSBHE Hold after BALE Low *
A2-A15 Valid, AEN Low to nIOCS16 Low
Address, nSBHE, AEN Set Up to nIOR Low
nIOR Low to Valid Data
nIOR Low to nTOPH, nTOPL Low
nIOR High to nTOPH, nTOPL High
nIOR High to Data High Impedance
AEN Hold after nIOR High
nIOR High to BALE High (Next Address)
Modified Version of Page 52 for Rev. D COM90C66 Only.
t6
t1
FIGURE 17 - READ I/O CYCLE
t3
Parameter
VALID
t2
t5
73
t4
min
10
20
20
25
30
0
0
0
0
VALID DATA
typ
t7
t8
t10
t9
max
80
30
25
15
20
**
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS

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