dq8051xp Digital Core Design, dq8051xp Datasheet - Page 8

• Manufacturer Part Number: dq8051xp
• Manufacturer: Digital Core Design

used to store large variables frequently accessed
by CPU, improving overall performance of applica‐
tion.
Internal Data Memory Interface – Internal Data
Memory interface controls access into the internal
256 bytes memory. It contains 8‐bit Stack Pointer
(SP) register and related logic.
User SFRs Interface – Special Function Registers
interface controls access to the special registers. It
contains standard and used defined registers and
related logic. User defined external devices can be
quickly accessed (read, written, modified) using all
direct addressing mode instructions.
Interrupt Controller – Interrupt control module is
responsible for the interrupt manage system for
the external and internal interrupt sources. It con‐
tains interrupt related registers such as Interrupt
Enable (IE), Interrupt Priority (IP), Extended Inter‐
rupt Enable (EIE), Extended Interrupt priority (EIP)
and (TCON) registers.
I/O Ports – Block contains 8051’s general purpose
I/O ports. Each of port’s pin can be read/write as a
single bit or as an 8‐bit bus called P0, P1, P2, and
P3.
Power Management Unit – Block contains ad‐
vanced power saving mechanisms with switchback
feature, allowing external clock control logic to
stop clocking (Stop mode) or run core in lower
clock frequency (Power Management Mode) to
significantly
Switchback feature allows UARTs, and interrupts
to be processed in full speed mode if enabled. It is
very desired when microcontroller is planned to
use in portable and power critical applications.
DoCD™ Debug Unit – it’s a real‐time hardware
debugger provides debugging capability of a whole
SoC system. In contrast to other on‐chip debuggers
DoCD™ provides non‐intrusive debugging of run‐
ning application. It can halt, run, step into or skip
an instruction, read/write any contents of micro‐
controller including all registers, internal, external,
program memories, all SFRs including user defined
peripherals. Hardware breakpoints can be set and
controlled on program memory, internal and ex‐
ternal data memories, as well as on SFRs. Hard‐
ware breakpoint is executed if any write/read oc‐
reduce
power
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consumption.
curred at particular address with certain data pat‐
tern or without pattern. Two additional pins
CODERUN, DEBUGACS indicate the sate of the
debugger and CPU. CODERUN is active when CPU
is executing an instruction. DEBUGACS pin is active
when any access is performed by DoCD™ debug‐
ger. The DoCD™ system includes JTAG interface
and complete set of tools to communicate and
work with core in real time debugging. It is built as
scalable unit and some features can be turned off
to save silicon and reduce power consumption. A
special care on power consumption has been
taken, and when debugger is not used it is auto‐
matically switched in power save mode. Finally
whole debugger is turned off when debug option is
no longer used.
Floating Point Unit – Block contains floating point
arithmetic IEEE‐754 compliant instructions (C float,
int, long int types supported). It is used to execute
single precision floating point operations such as:
addition, subtraction, multiplication, division,
square root, comparison absolute value of number
and change of sign. Basing on specialized CORDIC
algorithm a full set of trigonometric operations are
also allowed: sine, cosine, tangent, arctangent. It
also has built‐in integer to floating point and vice
versa conversion instructions. FPU supports single
precision real numbers, 16‐bit and 32‐bit signed
integers. This unit has included standard software
interface allows easy usage and interfacing with
user C/ASM written programs.
MDU32 Multiply Divide Unit – It’s a fixed point
fast 16‐bit and 32‐bit multiplication and division
unit.
signed integer operands. The MDU32 is controlled
by dedicated direct memory access module (called
DMA). All arguments and result registers are
automatically read and written back by internal
DMA. This unit has included standard software
interface allows easy usage and interfacing with
user C/ASM written programs. This module is re‐
placement of older MDU.
Timers – System timers’ module. Contains two 16
bits configurable timers: Timer 0 (TH0, TL0), Timer
1 (TH1, TL1) and Timers Mode (TMOD) registers. In
the timer mode, timer registers are incremented
every 12 CLK periods when appropriate timer is
enabled. In the counter mode the timer registers
It supports unsigned and 2’s complement