gl848 Genesys Logic, gl848 Datasheet - Page 13

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gl848

Manufacturer Part Number
gl848
Description
High Speed Usb 2.0 2-in-1 Scanner Controller With Fast Adf & Bus Power
Manufacturer
Genesys Logic
Datasheet
©2000-2007 Genesys Logic Inc. - All rights reserved.
HOME/DOC_SENR
CCD_CK1X
CCD_CPX/GPO32
CCD_TGX/TSTSEL0
CCD_CK2X/TSTSEL1
CCD_RSX/TSTSEL2
CCD_CK3X/TSTSEL3
CCD_CK4X/GPO33/MTR_SEL0
CCD_TGG/MTR_SEL1
CCD_TGB/MTR_SEL2
LAMP_SW/LED_R
XPA_SW/LED_G
GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
O
O
B
B
O
O
I
Reference level sampling clock for Analog Device AFE;
General Purpose Output.
Document sensor for ADF operation;
Home sensor for flatbed operation.
CCD Shift register clock1 or CIS clock output.
CCD Clamp gate clock or CIS clock output;
General Purpose Output.
When power-on initiates the scanner, this pin is used as
mode-select pin. Normally, it is for CCD Transfer gate clock for R
channel or CIS Line start pulse.
When power-on initiates the scanner, this pin is used as
When power-on initiates the scanner, this pin is used as
When power-on initiates the scanner, this pin is used as
mode-select pin. Normally, it is for CCD Shift register clock3.
Normal mode is TSTSEL[3:0] = 4’b0000
When power-on initiates the scanner, this pin is used as
motor-select pin. Normally, it is for CCD Shift register clock4, or
General Purpose Output.
When power-on initiates the scanner, this pin is used as
motor-select pin. Normally, it is for CCD Transfer gate clock of G
channel.
When power-on initiates the scanner, this pin is used as
motor-select pin. Normally, it is for CCD Transfer gate clock of B
channel.
MTR_SEL[2:0]=111 select Phase Table to output any timing
MTR_SEL[2:0]=100 select 3967
MTR_SEL[2:0]=011 select LB1939T/LB1940T
MTR_SEL[2:0]=001 select Bi_polar 2916 or 6219
MTR_SEL[2:0]=000 select Uni_polar 2003
Flatbed lamp power control;
CIS Red LED array control
Transparency lamp power control;
mode-select pin. Normally, it is for CCD Shift register clock2 or
CIS clock output.
mode-select pin. Normally, it is for CCD Reset gate clock or
CIS clock output.
Page 13

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