gl848 Genesys Logic, gl848 Datasheet - Page 54

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gl848

Manufacturer Part Number
gl848
Description
High Speed Usb 2.0 2-in-1 Scanner Controller With Fast Adf & Bus Power
Manufacturer
Genesys Logic
Datasheet
©2000-2007 Genesys Logic Inc. - All rights reserved.
Offset 87h ……..……..……..…………..………..…………..….………..…..…. Default value = 8’h00
Offset 88h ……..……..………………....………..…………..….………..…..…. Default value = 8’h00
Offset 89h
Offset 8Ah
7-5 RESERVED
4-0 RDNUM[4:0]
7-0 RS232WD[7:0] This port is for designers to write data to RS232 interface.
7-0 RS232RD[7:0] This port is for designers to read data to RS232 interface.
RS232WD7 RS232WD6 RS232WD5 RS232WD4 RS232WD3 RS232WD2 RS232WD1 RS232WD0
RS232RD7 RS232RD6 RS232RD5 RS232RD4 RS232RD3 RS232RD2 RS232RD1 RS232RD0
7 LED4TG
6 YENB
5 YBIT
4 ACYCNRLC
3 ENOFFSET
2 LEDADD
1 CK4ADC
0 AUTOCONF
Note: If YBIT=1, then YENB=1 => PH_Y=1; YENB=0 => PH_Y=0.
LED4TG
R/W
X
X
-
-
If YBIT=0, then YENB=1 => PH_Y=0; YENB=0 => PH_Y=1.
GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
YENB
R/W
X
X
-
-
0 Disable one dummy line for CIS motor moving purpose.
1 Enable one dummy line for CIS motor moving purpose.
0 Disable PH_Y output of the YBIT.
1 Enable PH_Y output of the YBIT to improve half-step operation of motor control.
Output port of PH_Y control signal to control Imax of 1939/1940 motor driver
IC.
0 Disable this function.
1 Generate RLC/ACYC pulse through BSMP pin to trigger Wolfson AFE
0 To disable this function.
1 To select automatic offset configuration for CIS color scanning.
0 Normal gray by controlling CIS single color LED array.
1 Enable true gray weighting in CIS by separately controlling the exposure times
0 Select MCLK (ADCCLK) to output default timing for specified AFE.
1 Select MCLK (ADCCLK) pin to output according to pattern defined by
0 To disable these functions.
1 Enable automatic channel switching and offset configuration for CIS color
-
Set the receiving length in bytes of RS232 interface.
auto-cycling for line-by-line color scanning.
of R, G, B LED array. Please refer to Reg 10~15.
CK4MAP (Reg 7A,7B,7C).
scanning.
YBIT
R/W
X
X
-
-
ACYCNRLC
RDNUM4
R/W
R/W
-
-
ENOFFSET LEDADD
RDNUM3
R/W
R/W
-
-
RDNUM2
R/W
R/W
-
-
RDNUM1
CK4ADC
R/W
R/W
-
-
AUTOCONF
RDNUM0
Page 54
R/W
R/W
-
-

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