gl848 Genesys Logic, gl848 Datasheet - Page 25

• Manufacturer Part Number: gl848
• Description: High Speed Usb 2.0 2-in-1 Scanner Controller With Fast Adf & Bus Power
• Manufacturer: Genesys Logic

©2000-2007 Genesys Logic Inc. - All rights reserved.
Offset 0Ah …………………………………………..…………..……..………. Default value = 8’h00
Offset 0Bh …………………………………………..…………..……..………. Default value = 8’h00
1-0 BAUDRAT [1:0] Set boud rate of RS232.
7-5 CLKSET [2:0] To select the system clock frequency.
2-0 DRAMSEL [2:0] Select the SDRAM size.
CLKSET2
5 EVEN1ST
4 BLINE1ST
3 BACKSCAN
1 SHORTTG
5 ADFSEL
4 LPWMEN
2 RS232SEL
4 RFHDIS
3 ENBDRAM
R/W
R/W
X
GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
CLKSET1
R/W
R/W
X
11 System clock*4.
0 The first pixel of stagger CCD is located at odd sensor line.
1 The first pixel of stagger CCD is located at even sensor line.
0 The first sensor of CCD is red line.
1 The first sensor of CCD is blue line.
0 Select forward scanning function.
1 Select backward scanning function.
0 Disable this function.
1 Enable short CCD SH(TG) period for film scanning.
0 Disable ADF function.
1 Enable ADF function and the specific GPIOs are defined to drive ADF module.
0 Disable ADF function.
1 Enable PWM function of lamp.
0 Disable RS232 interface.
1 Enable RS232 interface for special application and the specific GPIOs are
00 2400bps.
01 4800bps.
10 9600bps.
11 19200bps.
000 24MHz.
001 30MHz.
010 40MHz.
011 48MHz.
100 60MHz.
101 Reserved.
110 Reserved.
111 Reserved.
0 Enable auto-refresh mode for SDRAM.
1 Enable self-refresh mode for SDRAM.
A rising edge from low to high: to start power on sequence of SDRAM.
000 Reserved.
001 16M bits.
010 64M bist.
011 128M bits.
100 256M bits.
101 512M bits.
110
defined to implement RS232 protocol.
CLKSET0
ADFSEL
1G
R/W
R/W
bits.
LPWMEN
RFHDIS
R/W
R/W
ENBDRAM DRAMSEL2 DRAMSEL1 DRAMSEL0
R/W
X
X
RS232SEL BAUDRAT1 BAUDRAT0
R/W
R/W
R/W
R/W
Page 25
R/W
R/W