gl848 Genesys Logic, gl848 Datasheet - Page 61

• Manufacturer Part Number: gl848
• Description: High Speed Usb 2.0 2-in-1 Scanner Controller With Fast Adf & Bus Power
• Manufacturer: Genesys Logic

©2000-2007 Genesys Logic Inc. - All rights reserved.
7
6
Offset BBh ……..……..………………....………..…………..….………..…..…. Default value = 8’h00
Offset BCh ……..……..………………....………..…………..….………..…..… Default value = 8’hFF
7-0
Offset BDh ……..……..………………....………..…………..….………..…..… Default value = 8’h1F
7
6
5
2
1
Offset BEh ……..……..………………....………..…………..….………..…..…. Default value = 8’h00
5-0 MT_OFF [13:8] Output motor-off timing when motor releases the power for motor phase table
0
MT_OFF7 MT_OFF6 MT_OFF5 MT_OFF4 MT_OFF3 MT_OFF2 MT_OFF1 MT_OFF0
SW5_EN
SW2INV
R/W
R/W
R/W
CCD_OUT
AV_EN
MT_OFF [7:0] Output motor-off timing when motor releases the power for motor phase table
SW5_EN
SW5_SEL
SW5EXCHG
BGMM_N
GGMM_N
RGMM_N
X
X
X
GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
SW5_SEL
R/W
R/W
R/W
X
X
X
X
operation
operation
Enable special CCD timing of CCD SW5 for special application
Control CCD SW5 output which is based on internal CCD_CNX0 or CCD_CNX1
of ASIC
Control output position of CCD SW5 which is based on CCD SH
If this bit is set to “1”, it indicates that table[256] of B gamma in RAM is
ignored and replaced by “-1”
If this bit is set to “1”, it indicates that table[256] of G gamma in RAM is
ignored and replaced by “-1”
If this bit is set to “1”, it indicates that table[256] of R gamma in RAM is
ignored and replaced by “-1”
Enable internal CCD signal outputs including sh_enb, sh_enbx and ccd_cnt[2:0]
for external CPLD implementation to meet special CCD timing
Enable switch control for special CCD or CIS
SW5EXCHG
MT_OFF13 MT_OFF12 MT_OFF11 MT_OFF10 MT_OFF9 MT_OFF8
SW5INV
R/W
R/W
R/W
R/W
X
R/W
R/W
X
X
X
X
X
R/W
R/W
X
X
X
X
X
BGMM_N GGMM_N RGMM_N
BGMM_F
R/W
R/W
R/W
R/W
X
GGMM_F
R/W
R/W
R/W
R/W
X
RGMM_F
Page 61
R/W
R/W
R/W
R/W
X