PLL202-03 PhaseLink (PLL), PLL202-03 Datasheet

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PLL202-03

Manufacturer Part Number
PLL202-03
Description
Ali, Via, Sis, Intel 440BX Chipset FTGS , Freq. Progr., SST
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
FS (0:3)*
SDATA
Generates all clock frequencies for SIS540,
SIS630 Pentium
requiring multiple CPU clocks and high speed
SDRAM buffers.
Support 3 CPU clocks, 7PCI and 14 high-speed
SDRAM buffers for 3-DIMM applications.
One I2C selectable 24 or 48MHz clock output
(default 24 MHz).
One 48 MHz USB clock output.
Two14.318MHz reference clocks.
Support 2-wire I2C serial bus interface with built-
in Vendor ID, Device ID and Revision ID.
Single byte micro-step linear Frequency Progra-
mming via I2C with Glitch free smooth switching.
Spread Spectrum 0.25% center or -0.5% down.
50% duty cycle with low jitter.
Available in 300 mil 48 pin SSOP.
XOUT
SCLK
XIN
Motherboard Clock Generator for SIS540/630 with 133MHz FSB
Logic
PLL2
XTAL
PLL1
OSC
SST
I2C
/
Control
Logic
and K6 chip sets,
REF(0:1)
CPU(0:2)
PCI(0:6)
VDD1
VDDL2
VDD3
SDRAM(0:13)
VDD2
VDD4
48Mhz
24_48Mhz
PIN CONFIGURATION
Note:
POWER GROUP
KEY SPECIFICATIONS
REF0/FS3*
PCI0/FS1*
PCI1/FS2*
VDD0: PLL CORE
VDD1: REF(0:1), XIN, XOUT
VDD2: PCI(0:6)
VDD3: SDRAM(0:13)
VDD4: 48MHz, 24_48MHz
VDDL1: CPU(0:2)
CPU Cycle to Cycle jitter: 250ps.
PCI to PCI output skew: 500ps.
CPU to SDRAM output skew: 500ps.
CPU to CPU output skew: 250ps.
SDRAM to SDRAM output skew: 250ps.
CPU to PCI skew (CPU leads): 1 ~ 4 ns.
GNDREF
SDRAM3
SDRAM0
SDRAM2
SDRAM1
v
SDATA
: Pull down
XOUT
VDD1
VDD2
VDD3
SCLK
VDD0
PCI2
GND
PCI3
PCI4
PCI5
PCI6
GND
GND
XIN
v
v
v
1
1
2
2
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3
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22
23
23
24
24
*
: Bi-directional latched at power-up
48
48
47
47
46
46
45
45
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43
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42
42
41
41
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26
25
25
PLL202-03
REF1
CPU0
CPU1
GND
CPU2
VDD3
SDRAM13
SDRAM12
GND
SDRAM11
SDRAM10
VDD3
SDRAM9
SDRAM8
GND
SDRAM7
SDRAM6
VDD3
SDRAM5
SDRAM4
VDD4
48MHz/FS0*
24_48MHz/CPU2.5_3.3*
VDDL1
Rev 02/15/00 Page 1
v
v

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PLL202-03 Summary of contents

Page 1

... CPU Cycle to Cycle jitter: 250ps. PCI(0:6) PCI to PCI output skew: 500ps. VDD4 CPU to SDRAM output skew: 500ps. 48Mhz CPU to CPU output skew: 250ps. 24_48Mhz SDRAM to SDRAM output skew: 250ps. CPU to PCI skew (CPU leads ns. PLL202-03 REF1 ...

Page 2

... I2C byte1.bit7 to select either 24Mhz B (default) or 48Mhz. CPU2.5_3.3 input will program internal CPU skew circuits based on CPU voltage. If high, it selects 2.5V. If Low, it selects 3.3V (default). O Buffered reference clock output after input data latched during power-up. O Buffered reference clock output. PLL202-03 Description Rev 02/15/00 Page 2 ...

Page 3

... PLL202-03 Spread PCI Spectrum Modulation 33 -0.5% 33 -0.5% 37.6 0.25% 33 -0.5% 33.4 0.25% 33 -0.5% 37.6 0.25% 33 -0.5% 33.4 0.25% 32 -0.5% 28.3 0.25% 31.6 0.25% 31.6 0.25% 37.3 0.25% 27.6 0.25% 32 -0.5% 33.4 0.25% 33.4 0.25% 32.3 0.25% 33.4 0.25% 37.5 ...

Page 4

... PLL202-03 Spread SDRAM PCI Spectrum Modulation 66.8 33.4 0.25% 95.0 31.6 0.25% 96.2 32 -0.5% 97.0 32 -0.5% 97.0 32.3 0.25% 100.0 33 -0.5% 100.2 33.4 0.25% 112.0 37.3 0.25% 120.0 30.0 0.25% 133.3 33 -0.5% 133.6 33.4 0.25% 138.0 34.5 0.25% 140.0 35.0 0.25% 145.0 36.2 0.25% 147 ...

Page 5

... FS2 ( see Frequency selection Table ) 1 FS1 ( see Frequency selection Table ) 0 FS0 ( see Frequency selection Table ) 0 Frequency selection control bit 1=Via I2C, 0=Via External jumper 0 FS3 ( see Frequency selection Table ) 1 0=Normal 1=Spread Spectrum enable 0 0=Normal 1=Tristate Mode for all outputs PLL202- R Rev 02/15/00 Page 5 ...

Page 6

... Inverted power up latched CPU2.5_3.3 value (Read-back only) 1 PCI6 ( Active/Inactive ) 1 PCI5 ( Active/Inactive ) 1 PCI4 ( Active/Inactive ) 1 PCI3 ( Active/Inactive ) 1 PCI2 ( Active/Inactive ) 1 PCI1 ( Active/Inactive ) 1 PCI0 ( Active/Inactive ) Default Description 1 SDRAM7 ( Active/Inactive ) 1 SDRAM6 ( Active/Inactive ) 1 SDRAM5 ( Active/Inactive ) 1 SDRAM4 ( Active/Inactive ) 1 SDRAM3 ( Active/Inactive ) 1 SDRAM2 ( Active/Inactive ) 1 SDRAM1 ( Active/Inactive ) 1 SDRAM0 ( Active/Inactive ) PLL202-03 Rev 02/15/00 Page 6 ...

Page 7

... Inverted power up latched FS1 value (Read-back only) X Inverted power up latched FS0 value (Read-back only) 1 REF1 ( Active/Inactive ) 1 REF0 ( Active/Inactive ) Default Description 0 Revision ID Bit 3* 0 Revision ID Bit 2* 0 Revision ID Bit 1* 0 Revision ID Bit 0* 0 Vendor ID Bit 3* 0 Vendor ID Bit 2* 1 Vendor ID Bit 1* 1 Vendor ID Bit 0* PLL202-03 Rev 02/15/00 Page 7 ...

Page 8

... Linear programming magnitude bit 2 0 Linear programming magnitude bit 1 0 Linear programming magnitude bit 0 (LSB) Default 0 Reserved 0 Device ID Bit 6* 0 Device ID Bit 5* 0 Device ID Bit 4* 0 Device ID Bit 3* 1 Device ID Bit 2* 1 Device ID Bit 1* 0 Device ID Bit 0* PLL202-03 Description Description Rev 02/15/00 Page 8 ...

Page 9

... Motherboard Clock Generator for SIS540/630 with 133MHz FSB PROGRAMMING OF CPU FREQUENCY To simplify traditional loop counter setting, the PLL202-03 device incorporates SMART-BYTE ™ technology with a single byte programming via I2C to better optimize clock jitter and spread spectrum performance. Detail of PLL202-03's dual mode frequency programming method is described below: 1 ...

Page 10

... All Inputs except XIN V IH All inputs except XIN Logic inputs with internal pull-down I IL2 resistors R 2,7,8,25, 3. Logic Inputs IN C XIN & XOUT pins INX PLL202-03 MIN. MAX 0 0 0 -65 ...

Page 11

... L SDRAM CPU to CPU SDRAM to SDRAM PCI to PCI Measured @ 1.5V, equal loads CPU to SDRAM SDRAM to SDRAM CPU to PCI CPU V =3.3V(2.5V REF0, PCI, 48Mhz, 24_48Mhz V =3. SDRAM REF1 PLL202- MIN. TYP. MAX =2. Rev 02/15/00 Page 11 UNITS ...

Page 12

... PCI(0: 1.5V REF0 OL REF1 24_48MHz Measured @ 1.25V CPU PCI Measured @ 1.5V REF,48MHz,24MHz Measured @ 1.25V CPU PCI Measured @ 1.5V REF,48MHz,24MHz Measured @ 1.25V CPU Measured @ 1.5V SDRAM Measured @ 1.5V PCI PLL202- MIN. TYP. MAX 105 80 110 155 55 75 105 105 ...

Page 13

... MIN (0.20 - 0.41) 48PIN SSOP 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL202- PLL202-03 0.025 0.835 0.088 - 0.096 (2.250 - 2.450) 0.097 - 0.104 (2.467 - 2.642) TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE ...

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