A1240A-1CQ256B ACTEL [Actel Corporation], A1240A-1CQ256B Datasheet - Page 26
A1240A-1CQ256B
Manufacturer Part Number
A1240A-1CQ256B
Description
HiRel FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A1240A-1CQ256B.pdf
(98 pages)
- Current page: 26 of 98
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A CT 1 Ti m i n g Ch a r ac t e r i s t i cs
(W or st -C as e M il it ar y Cond it ion s, V
26
Parameter
Global Clock Network
t
t
t
t
t
t
f
TTL Output Module Timing
t
t
t
t
t
t
d
d
CMOS Output Module Timing
t
t
t
t
t
t
d
d
Notes:
1.
2.
CKH
CKL
PWH
PWL
CKSW
P
MAX
DLH
DHL
ENZH
ENZL
ENHZ
ENLZ
DLH
DHL
ENZH
ENZL
ENHZ
ENLZ
TLH
THL
TLH
THL
Delays based on 50 pF loading.
SSO information can be found in the Simultaneously Switching Output Limits for Actel FPGAs application note at
http://www.actel.com/appnotes.
Description
Input Low to High
Input High to Low
Minimum Pulse Width High
Minimum Pulse Width Low
Maximum Skew
Minimum Period
Maximum Frequency
Data to Pad High
Data to Pad Low
Enable Pad Z to High
Enable Pad Z to Low
Enable Pad High to Z
Enable Pad Low to Z
Delta Low to High
Delta High to Low
Data to Pad High
Data to Pad Low
Enable Pad Z to High
Enable Pad Z to Low
Enable Pad High to Z
Enable Pad Low to Z
Delta Low to High
Delta High to Low
1
1
C C
(continued)
= 4.5 V, T
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
J
= 1 25° C)
Min.
10.4
10.9
10.4
10.9
21.7
23.2
‘–1’ Speed
Max.
10.3
11.2
12.0
14.6
16.0
14.5
0.12
12.0
14.6
16.0
14.5
0.09
12.1
13.8
0.09
15.1
11.5
0.16
7.8
8.9
1.9
2.9
46
44
Min.
12.2
12.9
12.2
12.9
25.6
27.3
‘Std’ Speed
Max.
10.5
12.1
13.2
14.2
16.3
14.1
17.1
18.8
17.0
0.11
0.15
17.7
13.6
14.1
17.1
18.8
17.0
0.18
0.11
9.2
2.2
3.4
40
37
Units
ns/pF
ns/pF
ns/pF
ns/pF
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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