nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 142
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nrf24le1-f16q48-t
Manufacturer Part Number
nrf24le1-f16q48-t
Description
Ultra-low Power Wireless System On-chip Solution
Manufacturer
ETC-unknow
Datasheet
1.NRF24LE1-F16Q48-T.pdf
(191 pages)
- Current page: 142 of 191
- Download datasheet (2Mb)
nRF24LE1 Preliminary Product Specification
nRF24LE1 features a double buffered Serial Peripheral Interface (SPI). You can configure it to work in all
four SPI modes. The default is mode 0.
The SPI connects to the following pins of the device: MMISO , MMOSI , MSCK , SCSN , SMISO , SMOSI and
SSCK ..
The SPI Master function does not generate any chip select signal (CSN). The programmer typically uses
another programmable digital I/O to act as chip selects for one or more external SPI Slave devices.
18.1
18.2
Revision 1.1
18
•
•
•
•
•
Double buffered FIFO
Full-duplex operation
Supports SPI modes 0 through 3
Configurable data order on xMISO/xMOSI
Four (Master) and six (Slave) interrupt sources
SPI
Features
Block diagram
MMISO
SMOSI
SCSN
SSCK
Figure 58. SPI Master.
Figure 59. SPI Slave.
142 of 191
SPIMDAT
SPISDAT
MCU
MCU
MMOSI
SMISO
MSCK
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