nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 50

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

nRF24LE1 Preliminary Product Specification
Revision 1.1
Address
(Hex)
0C
0D
07
08
09
0A
0B
OBSERVE_TX
RX_ADDR_P0
RX_ADDR_P1
RX_ADDR_P2
RX_ADDR_P3
Mnemonic
PLOS_CNT
Reserved
RX_P_NO
TX_FULL
ARC_CNT
Reserved
Obsolete
STATUS
MAX_RT
RX_DR
TX_DS
RPD
RPD
39:0
39:0 0xC2C2C
Bit
3:1
7:4
3:0
7:1
7:0
7:0
0
7
6
5
4
0
0
0xE7E7E
000000
2C2C2
Reset
7E7E7
Value
0xC3
0xC4
111
0
0
0
0
0
0
0
0
Type
50 of 191
R/W Only '0' allowed
R/W Data Ready RX FIFO interrupt. Asserted when
R/W Data Sent TX FIFO interrupt. Asserted when
R/W Maximum number of TX retransmits interrupt
R/W Receive address data pipe 0. 5 Bytes maximum
R/W Receive address data pipe 1. 5 Bytes maximum
R/W Receive address data pipe 2. Only LSB. MSBytes
R/W Receive address data pipe 3. Only LSB. MSBytes
R
R
R
R
R
R
Don’t care
Status Register (In parallel to the SPI command
word applied on the MOSI pin, the STATUS register
is shifted serially out on the MISO pin)
new data arrives RX FIFO
Write 1 to clear bit.
packet transmitted on TX. If AUTO_ACK is acti-
vated, this bit is set high only when ACK is
received.
Write 1 to clear bit.
Write 1 to clear bit. If MAX_RT is asserted it must
be cleared to enable further communication.
Data pipe number for the payload available for
reading from RX_FIFO
000-101: Data Pipe Number
110: Not Used
111: RX FIFO Empty
TX FIFO full flag.
1: TX FIFO full.
0: Available locations in TX FIFO.
Transmit observe register
Count lost packets. The counter is overflow pro-
tected to 15, and discontinues at max until reset.
The counter is reset by writing to RF_CH.
Count retransmitted packets. The counter is reset
when transmission of a new packet starts.
Received Power Detector. This register is called
CD (Carrier Detect) in the nRF24L01. The name is
different in the RF Transceiver due to the different
input power level threshold for this bit. See section
3.3.4 on page
length. (LSByte is written first. Write the number of
bytes defined by SETUP_AW)
length. (LSByte is written first. Write the number of
bytes defined by SETUP_AW)
are equal to RX_ADDR_P1 39:8
are equal to RX_ADDR_P139:8
21.
Description
c
.