nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 52

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nrf24le1-f16q48-t

Manufacturer Part Number
nrf24le1-f16q48-t
Description
Ultra-low Power Wireless System On-chip Solution
Manufacturer
ETC-unknow
Datasheet
nRF24LE1 Preliminary Product Specification
Revision 1.1
Address
(Hex)
N/A
N/A
16
17
FIFO_STATUS
Mnemonic
RX_PW_P4
RX_PW_P5
RX_PW_P5
TX_REUSE
TX_EMPTY
RX_EMPTY
Reserved
Reserved
TX_FULL
Reserved
RX_FULL
ACK_PLD
TX_PLD
255:0
255:0
Bit
5:0
7:6
5:0
3:2
7
6
5
4
1
0
Reset
Value
00
00
X
X
0
0
0
0
0
1
0
1
Type
52 of 191
R/W Number of bytes in RX payload in data pipe 4 (1 to
R/W Only '00' allowed
R/W Number of bytes in RX payload in data pipe 5 (1 to
R/W Only '0' allowed
R/W Only '00' allowed
W
W
R
R
R
R
R
32 bytes).
0 Pipe not used
1 = 1 byte
32 = 32 bytes
32 bytes).
0 Pipe not used
1 = 1 byte
32 = 32 bytes
FIFO Status Register
Used for a PTX operation
Pulse the rfce high for at least 10µs to Reuse last
transmitted payload. TX payload reuse is active
until W_TX_PAYLOAD or FLUSH TX is executed.
TX_REUSE is set by the SPI command
REUSE_TX_PL, and is reset by the SPI commands
W_TX_PAYLOAD or FLUSH TX
TX FIFO full flag. 1: TX FIFO full. 0: Available loca-
tions in TX FIFO.
TX FIFO empty flag.
1: TX FIFO empty.
0: Data in TX FIFO.
RX FIFO full flag.
1: RX FIFO full.
0: Available locations in RX FIFO.
RX FIFO empty flag.
1: RX FIFO empty.
0: Data in RX FIFO.
Written by separate SPI command
ACK packet payload to data pipe number PPP
given in SPI command.
Used in RX mode only.
Maximum three ACK packet payloads can be
pending. Payloads with same PPP are handled
first in first out.
Written by separate SPI command TX data pay-
load register 1 - 32 bytes.
This register is implemented as a FIFO with three
levels.
Used in TX mode only.
Description

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