MC2GH256NMCA-2SA00 SAMSUNG [Samsung semiconductor], MC2GH256NMCA-2SA00 Datasheet - Page 10
MC2GH256NMCA-2SA00
Manufacturer Part Number
MC2GH256NMCA-2SA00
Description
SAMSUNG MultiMediaCard
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.MC2GH256NMCA-2SA00.pdf
(102 pages)
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In SPI mode only 16bits (containing the errors relevant to SPI mode) can be read out of the MultiMediaCard status regis-
ter.
Memory partioning in SPI mode is equivalent to MultiMediaCard mode. All read and write commands are byte address-
able.
In SPI mode, only single block read/write mode is supported.
In SPI mode, only single block mode is supported. The typical access time (latency) for each data block, in read opera-
tion, is 1.5ms. The write typical access time (latency) for each data block, in read operation, is 1.5ms. The write block
operation is done in handshake mode. The card will keep DataOut line low as long as the write operation is in progress
and there are no write buffers available.
Same as in the MultiMediaCard mode.
Same as in the MultiMediaCard mode.
3.9.3 Card status
3.9.4 Memroy Array Partitioning
3.9.5 Read and Write Operations
3.9.6 Data Transfer Rate
3.9.7 Data protection in the MultiMediaCard
3.9.8 Erase
The SPI mode is a secondary (optional) communication protocol offered for MultiMediaCard. This mode is a subset of the
MultiMediaCard protocol, designed to communicate with an SPI channel, commonly found in Motorola’s(and lately a few
other vendors’) microcontrollers.
The operating condition negotiation function of the MultiMediaCard bus is not supported in SPI mode. The host must work
within the valid voltage range (2.7 to 3.6 volts) of the card.
The card acquisition and identification function of the MultiMediaCard bus is not supported in SPI mode. The host must
know the number of cards currently connected on the bus. Specific card selection is done via the CS signal.
3.9.1 Negotiating Operation Conditions
3.9.2 Card Acquisition and Identification
Revision 0.3
3.9 SPI Mode
10
MultiMediaCard
Sep.22.2005
TM
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