MC2GH256NMCA-2SA00 SAMSUNG [Samsung semiconductor], MC2GH256NMCA-2SA00 Datasheet - Page 100

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MC2GH256NMCA-2SA00

Manufacturer Part Number
MC2GH256NMCA-2SA00
Description
SAMSUNG MultiMediaCard
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
• Multiple Block Read - Stop Transmission is sent between blocks
CS
DataIN
DataOut Z Z H H H * * * * H * * H Card Resp H * * H Data Block H * * H Data Block H H * * H Card Resp
The timing for de-asserting the CS signal after the last card response is identical to a standard command/response trans-
action as described in Figure 7-15;
• Multiple Block Read - Stop Transmission is sent within a block
CS
DataIn
DataOut Z Z H H H * * * * H * * H Card Resp H * * H Data Block H * * H Data X X H * * H Card Resp
In an Open-ended (or host aborted) multiple block read transaction the stop transmission command may be sent asyn-
chronously to the data transmitted out of the card and may overlap the data block. In this case the card will stop sending
the data and transmit the response token as well. The delay between command and response is standard N
The first byte, however, is not guaranteed to be all set to ‘1’. The card is allowed up to two clocks to stop data transmis-
sion.
The timing for de-asserting the CS signal after the last card response is identical to a standard command/ response trans-
action as described in Figure 7-15;
• Reading the CSD and CID registers
The following timing diagram describes the SEND_CSD and SEND_CID command bus transaction. The time-out values
between the response and the data block is N
the read register commands
CS
DataIn
DataOut
the time the CSD register is read). The SEND_CID transaction complies with the same timing diagram for consistency of
Revision 0.3
H L L
X H * * H Read Cmd H H H H
H L L
X H * * H Read Cmd H H H H
←N
←N
H L L L
X
Z Z H H H H * * * * * * * *
← N
CS
CS
Figure 7-19 : SPI Multiple Block Read, Stop Transmission Does Not Overlap Data
H * * H
CS
Figure 7-20 : SPI Multiple Block Read, Stop Transmission Overlaps Data
⎯→
SEND_CSD/CID H H H H H
←N
←N
Figure 7-21 : SPI Read CSD and CID Registers
CR
CR
* * * * * * * * * * * * * * * * * * * *
* * * * * * * * * * * * * * * * * * * *
* * * * * * * * * * * * * * * * * * * *
← N
CX
* * * * * * * * * * * *
H * * H
, and not N ac , which is used for data read (since N ac is still unknown at
CR
* * * * * * * * * * * * * * *
⎯→
←N
←N
AC
AC
100
Card Response
* * * * * * * * * * * * * * *
H H H Stop Cmd H H H H H H H H H H
← N
←N
←N
H * * H
AC
AC
CX
H H Stop Cmd H H H H H H H
⎯→
Data Block H H H H Z Z Z
←⎯⎯ N
MultiMediaCard
CR
←N
←N
L L L H H H H
H * * H X X X X
⎯⎯→
CR
EC
Sep.22.2005
L L L L L
L L L L L
CR
Clocks.
TM

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