EPF10K10 ETC, EPF10K10 Datasheet - Page 118

• Manufacturer Part Number: EPF10K10
• Description: EMBEDDED PROGRAMMABLE LOGIC FAMILY
• Manufacturer: ETC

Notes:
(1)
(2)
(3)
Power
Consumption
118
FLEX 10K Embedded Programmable Logic Family Data Sheet
t
t
t
f
t
f
t
f
f
t
t
t
t
Symbol
CLK2
CLK2
R
F
INDUTY
CLK1
CLK1
CLKDEV1
CLKDEV2
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 114. ClockLock & ClockBoost Parameters
To implement the ClockLock and ClockBoost circuitry with the MAX+PLUS II software, designers must specify the
input frequency. The MAX+PLUS II software tunes the PLL in the ClockLock and ClockBoost circuitry to this
frequency. The f
during device operation. Simulation does not reflect this parameter.
During device configuration, the ClockLock and ClockBoost circuitry is configured before the rest of the device. If
the incoming clock is supplied during configuration, the ClockLock and ClockBoost circuitry locks during
configuration, because the t
The t
JITTER
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost clock multiplication factor equals 1)
Input clock period (ClockBoost clock multiplication factor equals 1)
Input clock frequency (ClockBoost clock multiplication factor equals 2)
Input clock period (ClockBoost clock multiplication factor equals 2)
Input deviation from user specification in MAX+PLUS II (ClockBoost clock
multiplication factor equals 1)
Input deviation from user specification in MAX+PLUS II (ClockBoost clock
multiplication factor equals 2)
Input clock stability (measured between adjacent clocks)
Time required for ClockLock or ClockBoost to acquire lock
Jitter on ClockLock or ClockBoost-generated clock
Duty cycle for ClockLock or ClockBoost-generated clock
specification is measured under long-term observation.
CLKDEV
parameter specifies how much the incoming clock can differ from the specified frequency
Table 114
The supply power (P) for FLEX 10K devices can be calculated with the
following equation:
P = P
Typical I
device DC operating conditions tables on
sheet. The I
application logic. This value is calculated based on the amount of current
that each LE typically consumes. The P
device output load characteristics and switching frequency, can be
calculated using the guidelines given in
Power for Altera
LOCK
INT
value is less than the time required for configuration.
(1)
(1)
CCSTANDBY
+ P
Parameter
summarizes the ClockLock and ClockBoost parameters.
CCACTIVE
IO
= (I
Devices).
CCSTANDBY
values are shown as I
value depends on the switching frequency and the
(3)
(2)
+ I
CCACTIVE )
IO
Application Note 74 (Evaluating
pages
value, which depends on the
CC0
V
in the FLEX 10K 5.0-V
CC
Min
12.5
44, 47, and
45
30
16
20
40
+ P
IO
Typ
50
Altera Corporation
50
Max
33.3
62.5
100
of this data
55
80
50
10
60
0.5
2
2
1
1
Unit
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ps
µs
ns
%
%