Z80181 Zilog., Z80181 Datasheet - Page 40

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Z80181

Manufacturer Part Number
Z80181
Description
SMART ACCESS CONTROLLER (SAC)
Manufacturer
Zilog.
Datasheet

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Zilog
SCC REGISTERS (Continued)
2-40
Write Register 9
Write Register 10
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0
0
1
1
0
1
0
1
0
0
1
1
No Reset
Reserved
Channel Reset A
Force Hardware Reset
0
1
0
1
NRZ
NRZI
FM1 (Transition = 1)
FM0 (Transition = 0)
(i)
(j)
Figure 50. Write Register Bit Functions (Continued)
VIS
NV
DLC
MIE
Status High//Status Low
0
6 Bit//8 Bit Sync
Loop Mode
Abort//Flag On Underrun
Mark//Flag Idle
Go Active On Poll
CRC Preset I//O
Write Register 11
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 12
D7 D6 D5 D4 D3 D2 D1 D0
0
0
1
1
0
1
0
1
Receive Clock - /RTxC Pin
Receive Clock - /TRxC Pin
Receive Clock - BR Generator Output
Receive Clock - DPLL Output
0
0
1
1
0
1
0
1
Transmit Clock - /RTxC Pin
Transmit Clock - /TRxC Pin
Transmit Clock - BR Generator Output
Transmit Clock - DPLL Output
0
0
1
1
(k)
0
1
0
1
(l)
/TRxC Out - Xtal Output
/TRxC Out - Transmit Clock
/TRxC Out - BR Generator Output
/TRxC Out - DPLL Output
S
MART
/TRxC O/I
/RTxC Xtal//No Xtal
A
CCESS
TC0
TC1
TC2
TC3
TC4
TC5
TC6
TC7
C
DS971800500
ONTROLLER
Lower Byte of
Time Constant
Z80181
SAC

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