Z80181 Zilog., Z80181 Datasheet - Page 47

• Manufacturer Part Number: Z80181
• Description: SMART ACCESS CONTROLLER (SAC)
• Manufacturer: Zilog.

Zilog
Table 5 shows the state of the SAC’s data bus when the
Z80181 is NOT in bus master condition.
I/O And Memory Transactions
Z80181 Data Bus
(REME Bit = 0)
Z80181 Data Bus
(REME Bit = 1)
Interrupt Acknowledge Transaction
Z80181 Data Bus
(REME Bit = 0)
Z80181 Data Bus
(REME Bit = 1)
The word “OUT” means that the Z181 data bus direction is
in output mode, “IN” means input mode, and “HI-Z” means
high impedance.
DS971800500
Table 5. Data Bus Direction for External Bus Master (Z80181 Is Not Bus Master)
I/O
Write To
On-Chip
Peripherals Peripherals Peripheral Peripheral
(SCC/CTC/ (SCC/CTC/
PIA1/PIA2) PIA1/PIA2)
In
In
Intack For
On-Chip
Peripheral
(SCC/CTC)
Out
Out
I/O
Read From
On-Chip
Out
Out
Intack For
Off-Chip
Peripheral
In
In
I/O
Write To
Off-Chip
Z
Z
I/O
Read From To
Off-Chip
Z
Z
“REME” stands for “ROM Emulator Mode” and is the status
of D2 bit in the System Configuration Register.
Write
Memory
Z
Z
Read
From
Memory
In
In
S
MART
Refresh
Z
Z
A
CCESS
C
ONTROLLER
Z80181
Mode
Idle
Z
Z
Z80181
2-47
SAC
™